TMS320VC5507_14 Datasheet, PDF (127/137 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Electrical Specifications
NO.
IC16
IC17
IC18
IC19
IC20
IC21
IC22
IC23
IC24
IC25
IC26
IC27
IC28
IC29
Table 5−40. I²C Signals (SDA and SCL) Switching Characteristics
PARAMETER
CVDD = 1.2 V
CVDD = 1.35 V
STANDARD
MODE
FAST
MODE
CVDD = 1.6 V
STANDARD
MODE
FAST
MODE
MIN MAX
MIN
MAX MIN MAX
MIN
MAX
tc(SCL)
Cycle time, SCL
10
2.5
Delay time, SCL high to
td(SCLH-SDAL) SDA low for a repeated 4.7
0.6
START condition
10
2.5
4.7
0.6
Delay time, SDA low to
td(SDAL-SCLL)
SCL low for a START and
a repeated START
4
0.6
condition
4
0.6
tw(SCLL)
Pulse duration, SCL low
4.7
1.3
tw(SCLH)
Pulse duration, SCL high
4
0.6
td(SDA-SCLH)
Delay time, SDA valid to
SCL high
250
100
4.7
1.3
4
0.6
250
100
Valid time, SDA valid
tv(SCLL-SDAV) _{after SCL low}
0
0
0.9
0
0
0.9
tw(SDAH)
Pulse duration, SDA high
between STOP and
START conditions
tr(SDA)
tr(SCL)
tf(SDA)
tf(SCL)
td(SCLH-SDAH)
Rise time, SDA
Rise time, SCL
Fall time, SDA
Fall time, SCL
Delay time, SCL high to
SDA high for a STOP
condition
4.7
1.3
1000 20 + 0.1Cb† 300
1000 20 + 0.1Cb† 300
300 20 + 0.1Cb† 300
300 20 + 0.1Cb† 300
4
0.6
4.7
1.3
1000 20 + 0.1Cb† 300
1000 20 + 0.1Cb† 300
300 20 + 0.1Cb† 300
300 20 + 0.1Cb† 300
4
0.6
Capacitance for each
Cp
I2C pin
10
10
10
10
UNIT
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
ns
µs
pF
† _{Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed.}
SDA
SCL
IC26
IC23
IC25
IC19
IC20
IC21
IC16
IC18
IC22
IC27
IC18
IC17
Stop Start
Repeated
Start
Figure 5−38. I²C Transmit Timings
April 2004 − Revised January 2008
IC24
IC28
Stop
SPRS244J 127