OMAP3515DCBC Datasheet, PDF (75/264 Pages) Texas Instruments – OMAP3515/03 Applications Processor

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OMAP3515/03 Applications Processor
SPRS505F – FEBRUARY 2008 – REVISED SEPTEMBER 2009
Table 2-3. Ball Characteristics (CUS Pkg.) (continued)
BALL
BALL TOP [2] PIN NAME [3] MODE [4]
BOTTOM [1]
TYPE [5]
safe_mode 7
B21
cam_d5
0
gpio_104
4
safe_mode 7
L24
cam_d6
0
gpio_105
4
safe_mode 7
K24
cam_d7
0
gpio_106
4
safe_mode 7
J23
cam_d8
0
gpio_107
4
safe_mode 7
K23
cam_d9
0
gpio_108
4
safe_mode 7
F21
cam_d10
0
gpio_109
4
safe_mode 7
G21
cam_d11
0
gpio_110
4
safe_mode 7
C22
cam_ xclkb 0
gpio_111
4
safe_mode 7
F18
cam_wen
0
cam_ shutter 2
gpio_167
4
safe_mode 7
J20
cam_ strobe 0
gpio_126
4
safe_mode 7
V20
mcbsp2_fsx 0
gpio_116
4
safe_mode 7
T21
mcbsp2_ clkx 0
gpio_117
4
safe_mode 7
V19
mcbsp2_dr 0
gpio_118
4
safe_mode 7
R20
mcbsp2_dx 0
gpio_119
4
safe_mode 7
M23
mmc1_clk 0
gpio_120
4
safe_mode 7
L23
mmc1_cmd 0
gpio_121
4
safe_mode 7
M22
mmc1_dat0 0
gpio_122
4
safe_mode 7
I
L
IO
I
L
IO
I
L
IO
I
L
IO
I
L
IO
I
L
IO
I
L
IO
O
L
IO
I
L
O
IO
O
L
IO
IO
L
IO
IO
L
IO
I
L
IO
IO
L
IO
O
L
IO
IO
L
IO
IO
L
IO
BALL RESET BALL RESET RESET REL. POWER [9]
STATE [6] REL. STATE MODE [8]
[7]
HYS [10]
L
7
vdds
Yes
4
L
7
vdds
NA
4
L
7
vdds
NA
4
L
7
vdds
NA
4
L
7
vdds
NA
4
L
7
vdds
Yes
4
L
7
vdds
Yes
4
L
7
vdds
Yes
4
L
7
vdds
Yes
4
L
7
vdds
Yes
4
L
7
vdds
Yes
4 ⁽¹⁾
L
7
vdds
Yes
4 ⁽¹⁾
L
7
vdds
Yes
4 ⁽¹⁾
L
7
vdds
Yes
4 ⁽¹⁾
L
7
vdds_mmc1 Yes
8
L
7
vdds_mmc1 Yes
8
L
7
vdds_mmc1 Yes
8
BUFFER
PULLUP
STRENG TH /DOWN TYPE
(mA) [11]
[12]
PU/ PD
LVCMOS
PD
LVCMOS
PD
LVCMOS
PD
LVCMOS
PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
(1) The buffer strength of this IO cell is programmable (2, 4, 6, or 8 mA) according to the selected mode; the default value is described in
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TERMINAL DESCRIPTION
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