MSP430FR5969_14 Datasheet, PDF (75/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B – OCTOBER 2012 – REVISED MAY 2014
Table 6-38. 32-Bit Hardware Multiplier Registers (Base Address: 04C0h) (continued)
REGISTER DESCRIPTION
16 × 16 sum extension register
32-bit operand 1 – multiply low word
32-bit operand 1 – multiply high word
32-bit operand 1 – signed multiply low word
32-bit operand 1 – signed multiply high word
32-bit operand 1 – multiply accumulate low word
32-bit operand 1 – multiply accumulate high word
32-bit operand 1 – signed multiply accumulate low word
32-bit operand 1 – signed multiply accumulate high word
32-bit operand 2 – low word
32-bit operand 2 – high word
32 × 32 result 0 – least significant word
32 × 32 result 1
32 × 32 result 2
32 × 32 result 3 – most significant word
MPY32 control register 0
REGISTER
SUMEXT
MPY32L
MPY32H
MPYS32L
MPYS32H
MAC32L
MAC32H
MACS32L
MACS32H
OP2L
OP2H
RES0
RES1
RES2
RES3
MPY32CTL0
OFFSET
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
22h
24h
26h
28h
2Ah
2Ch
Table 6-39. DMA Registers (Base Address DMA General Control: 0500h,
DMA Channel 0: 0510h, DMA Channel 1: 0520h, DMA Channel 2: 0530h)
REGISTER DESCRIPTION
DMA channel 0 control
DMA channel 0 source address low
DMA channel 0 source address high
DMA channel 0 destination address low
DMA channel 0 destination address high
DMA channel 0 transfer size
DMA channel 1 control
DMA channel 1 source address low
DMA channel 1 source address high
DMA channel 1 destination address low
DMA channel 1 destination address high
DMA channel 1 transfer size
DMA channel 2 control
DMA channel 2 source address low
DMA channel 2 source address high
DMA channel 2 destination address low
DMA channel 2 destination address high
DMA channel 2 transfer size
DMA module control 0
DMA module control 1
DMA module control 2
DMA module control 3
DMA module control 4
DMA interrupt vector
REGISTER
DMA0CTL
00h
DMA0SAL
02h
DMA0SAH
04h
DMA0DAL
06h
DMA0DAH
08h
DMA0SZ
0Ah
DMA1CTL
00h
DMA1SAL
02h
DMA1SAH
04h
DMA1DAL
06h
DMA1DAH
08h
DMA1SZ
0Ah
DMA2CTL
00h
DMA2SAL
02h
DMA2SAH
04h
DMA2DAL
06h
DMA2DAH
08h
DMA2SZ
0Ah
DMACTL0
00h
DMACTL1
02h
DMACTL2
04h
DMACTL3
06h
DMACTL4
08h
DMAIV
0Eh
OFFSET
Copyright © 2012–2014, Texas Instruments Incorporated
Detailed Description
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