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| MSP430FR5969_14 Datasheet, PDF (66/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers | |||
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MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B â OCTOBER 2012 â REVISED MAY 2014
www.ti.com
6.10.12 TB0
TB0 is a 16-bit timer and counter (Timer_B type) with seven capture/compare registers. It can support
multiple captures or compares, PWM outputs, and interval timing. It has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the
capture/compare registers.
Table 6-15. TB0 Signal Connections
INPUT PORT PIN
DEVICE INPUT
SIGNAL
MODULE INPUT
SIGNAL
P2.0
P2.0
P2.1
P2.5
TB0CLK
ACLK (internal)
SMCLK (internal)
TB0CLK
TB0.0
TB0.0
TBCLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
DVSS
GND
MODULE
BLOCK
Timer
CCR0
MODULE
OUTPUT
SIGNAL
N/A
TB0
P1.4
DVCC
TB0.1
VCC
CCI1A
COUT (internal)
CCI1B
CCR1
TB1
DVSS
GND
P1.5
DVCC
TB0.2
VCC
CCI2A
ACLK (internal)
CCI2B
CCR2
TB2
DVSS
GND
P3.4
DVCC
TB0.3
VCC
CCI3A
P1.6
TB0.3
CCI3B
CCR3
TB3
DVSS
GND
P3.5
DVCC
TB0.4
VCC
CCI4A
P1.7
TB0.4
CCI4B
CCR4
TB4
DVSS
GND
P3.6
DVCC
TB0.5
VCC
CCI5A
P4.4
TB0.5
CCI5B
CCR5
TB5
DVSS
GND
P3.7
DVCC
TB0.6
VCC
CCI6A
P2.0
TB0.6
CCI6B
CCR6
TB6
DVSS
GND
DVCC
VCC
(1) Only on devices with ADC.
DEVICE
OUTPUT
SIGNAL
OUTPUT PORT PIN
N/A
TB0.0
TB0.1
TB0.2
P2.1
P2.5
ADC12 (internal)(1)
ADC12SHSx = {2}
P1.4
P2.6
ADC12 (internal)(1)
ADC12SHSx = {3}
P1.5
P2.2
TB0.3
P3.4
P1.6
TB0.4
P3.5
P1.7
TB0.5
P3.6
P4.4
TB0.6
P3.7
P2.0
66
Detailed Description
Copyright © 2012â2014, Texas Instruments Incorporated
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Product Folder Links: MSP430FR5969 MSP430FR59691 MSP430FR5968 MSP430FR5967 MSP430FR5959
MSP430FR5958 MSP430FR5957 MSP430FR5949 MSP430FR5948 MSP430FR5947 MSP430FR59471
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