MSP430FR5969_14 Datasheet, PDF (70/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B – OCTOBER 2012 – REVISED MAY 2014
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SFR interrupt enable
SFR interrupt flag
SFR reset pin control
Table 6-19. Special Function Registers (Base Address: 0100h)
REGISTER DESCRIPTION
REGISTER
SFRIE1
00h
SFRIFG1
02h
SFRRPCR
04h
OFFSET
PMM Control 0
PMM interrupt flags
PM5 Control 0
Table 6-20. PMM Registers (Base Address: 0120h)
REGISTER DESCRIPTION
REGISTER
PMMCTL0
PMMIFG
PM5CTL0
OFFSET
00h
0Ah
10h
FRAM control 0
General control 0
General control 1
Table 6-21. FRAM Control Registers (Base Address: 0140h)
REGISTER DESCRIPTION
REGISTER
FRCTL0
00h
GCCTL0
04h
GCCTL1
06h
OFFSET
Table 6-22. CRC16 Registers (Base Address: 0150h)
REGISTER DESCRIPTION
CRC data input
CRC data input reverse byte
CRC initialization and result
CRC result reverse byte
REGISTER
CRC16DI
CRCDIRB
CRCINIRES
CRCRESR
OFFSET
00h
02h
04h
06h
Watchdog timer control
Table 6-23. Watchdog Registers (Base Address: 015Ch)
REGISTER DESCRIPTION
REGISTER
WDTCTL
OFFSET
00h
CS control 0
CS control 1
CS control 2
CS control 3
CS control 4
CS control 5
CS control 6
Table 6-24. CS Registers (Base Address: 0160h)
REGISTER DESCRIPTION
REGISTER
CSCTL0
CSCTL1
CSCTL2
CSCTL3
CSCTL4
CSCTL5
CSCTL6
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
System control
JTAG mailbox control
JTAG mailbox input 0
JTAG mailbox input 1
JTAG mailbox output 0
JTAG mailbox output 1
Table 6-25. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION
REGISTER
SYSCTL
SYSJMBC
SYSJMBI0
SYSJMBI1
SYSJMBO0
SYSJMBO1
OFFSET
00h
06h
08h
0Ah
0Ch
0Eh
70
Detailed Description
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