MSP430FR5969_14 Datasheet, PDF (64/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B – OCTOBER 2012 – REVISED MAY 2014
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6.10.10 TA0, TA1
TA0 and TA1 are 16-bit timers and counters (Timer_A type) with three capture/compare registers each.
Each can support multiple captures or compares, PWM outputs, and interval timing. Each has extensive
interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each
of the capture/compare registers.
Table 6-11. TA0 Signal Connections
INPUT PORT PIN
DEVICE INPUT
SIGNAL
MODULE INPUT
SIGNAL
P1.2
P1.2
P1.6
P2.3
P1.0
TA0CLK
ACLK (internal)
SMCLK (internal)
TA0CLK
TA0.0
TA0.0
DVSS
DVCC
TA0.1
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
V_CC
CCI1A
MODULE
BLOCK
Timer
CCR0
MODULE
OUTPUT
SIGNAL
N/A
TA0
COUT (internal)
CCI1B
CCR1
TA1
DVSS
GND
P1.1
DVCC
TA0.2
V_CC
CCI2A
ACLK (internal)
CCI2B
CCR2
TA2
DVSS
GND
DVCC
V_CC
(1) Only on devices with ADC.
DEVICE
OUTPUT
SIGNAL
OUTPUT PORT PIN
N/A
TA0.0
P1.6
P2.3
TA0.1
P1.0
ADC12(internal) ⁽¹⁾
ADC12SHSx = {1}
TA0.2
P1.1
Table 6-12. TA1 Signal Connections
INPUT PORT PIN
DEVICE INPUT
SIGNAL
MODULE INPUT
SIGNAL
P1.1
P1.1
P1.7
P2.4
P1.2
TA1CLK
ACLK (internal)
SMCLK (internal)
TA1CLK
TA1.0
TA1.0
DVSS
DVCC
TA1.1
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
V_CC
CCI1A
MODULE
BLOCK
Timer
CCR0
MODULE
OUTPUT
SIGNAL
N/A
TA0
COUT (internal)
CCI1B
CCR1
TA1
DVSS
GND
P1.3
DVCC
TA1.2
V_CC
CCI2A
ACLK (internal)
CCI2B
CCR2
TA2
DVSS
GND
DVCC
V_CC
(1) Only on devices with ADC.
DEVICE
OUTPUT
SIGNAL
OUTPUT PORT PIN
N/A
TA1.0
P1.7
P2.4
TA1.1
P1.2
ADC12(internal) ⁽¹⁾
ADC12SHSx = {4}
TA1.2
P1.3
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