MSP430FR5969_14 Datasheet, PDF (11/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B – OCTOBER 2012 – REVISED MAY 2014
4.5 Pin Diagram – DA Package – MSP430FR595x (HFXT Only)
Figure 4-5 shows the 38-pin DA package.
PJ.6/HFXIN 1
PJ.7/HFXOUT 2
AVSS 3
AVCC 4
P1.0/TA0.1/DMAE0/A0/C0/VREF-/VeREF- 5
P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ 6
P1.2/TA1.1/TA0CLK/COUT/A2/C2 7
P3.0/A12/C12 8
P3.1/A13/C13 9
P3.2/A14/C14 10
P3.3/A15/C15 11
P1.3/TA1.2/UCB0STE/A3/C3 12
P1.4/TB0.1/UCA0STE/A4/C4 13
P1.5/TB0.2/UCA0CLK/A5/C5 14
PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6 15
PJ.1/TDI/TCLK/MCLK/SRSCG0/C7 16
PJ.2/TMS/ACLK/SROSCOFF/C8 17
PJ.3/TCK/SRCPUOFF/C9 18
P2.5/TB0.0/UCA1TXD/UCA1SIMO 19
38 AVSS
37 P2.4/TA1.0/UCA1CLK/A7/C11
36 P2.3/TA0.0/UCA1STE/A6/C10
35 P2.7
34 DVCC
33 DVSS
32 P4.4/TB0.5
31 P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0
30 P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0
29 P3.7/TB0.6
28 P3.6/TB0.5
27 P3.5/TB0.4/COUT
26 P3.4/TB0.3/SMCLK
25 P2.2/TB0.2/UCB0CLK
24 P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0
23 P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK
22 RST/NMI/SBWTDIO
21 TEST/SBWTCK
20 P2.6/TB0.1/UCA1RXD/UCA1SOMI
On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX
Figure 4-5. 38-Pin DA Package (Top View) – MSP430FR595x
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Terminal Configuration and Functions
11
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Product Folder Links: MSP430FR5969 MSP430FR59691 MSP430FR5968 MSP430FR5967 MSP430FR5959
MSP430FR5958 MSP430FR5957 MSP430FR5949 MSP430FR5948 MSP430FR5947 MSP430FR59471