MSP430FR5969_14 Datasheet, PDF (60/132 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704B – OCTOBER 2012 – REVISED MAY 2014
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NOTE
Configuration of Digital I/Os After BOR Reset
To prevent any cross currents during start-up of the device, all port pins are high-impedance
with Schmitt triggers, and their module functions disabled. To enable the I/O functionality
after a BOR reset, the ports must be configured first and then the LOCKLPM5 bit must be
cleared. For details, refer to the "Configuration After Reset" section of the "Digital I/O"
chapter in the MSP430FR58xx, MSP430FR59xx, MSP430FR68xx, MSP430FR69xx Family
User's Guide (SLAU367).
6.10.2 Oscillator and Clock System (CS)
The clock system includes support for a 32-kHz watch-crystal oscillator XT1 (LF), an internal very-low-
power low-frequency oscillator (VLO), an integrated internal digitally controlled oscillator (DCO), and a
high-frequency crystal oscillator XT2 (HF). The clock system module is designed to meet the requirements
of both low system cost and low power consumption. A fail-safe mechanism exists for all crystal sources.
The clock system module provides the following clock signals:
• Auxiliary clock (ACLK). ACLK can be sourced from a 32-kHz watch crystal (LFXT1), the internal low-
frequency oscillator (VLO), or a digital external low-frequency (<50 kHz) clock source.
• Main clock (MCLK), the system clock used by the CPU. MCLK can be sourced from a high-frequency
crystal (HFXT2), the internal digitally controlled oscillator DCO, a 32-kHz watch crystal (LFXT1), the
internal low-frequency oscillator (VLO), or a digital external clock source.
• Sub-Main clock (SMCLK), the subsystem clock used by the peripheral modules. SMCLK can be
sourced by same sources made available to MCLK.
6.10.3 Power Management Module (PMM)
The primary functions of the PMM are:
• Supply regulated voltages to the core logic
• Supervise voltages that are connected to the device (at DVCC pins)
• Give reset signals to the device during power-on and power-off
6.10.4 Hardware Multiplier (MPY)
The multiplication operation is supported by a dedicated peripheral module. The module performs
operations with 32-bit, 24-bit, 16-bit, and 8-bit operands. The module supports signed multiplication,
unsigned multiplication, signed multiply-and-accumulate, and unsigned multiply-and-accumulate
operations.
6.10.5 Real-Time Clock (RTC_B) (Only MSP430FR596x and MSP430FR594x)
The RTC_B module contains an integrated real-time clock (RTC). It integrates an internal calendar that
compensates for months with less than 31 days and includes leap year correction. The RTC_B also
supports flexible alarm functions and offset-calibration hardware. RTC operation is available in LPM3.5
modes to minimize power consumption.
6.10.6 Watchdog Timer (WDT_A)
The primary function of the WDT_A module is to perform a controlled system restart if a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not
needed in an application, the module can be configured as an interval timer and can generate interrupts at
selected time intervals.
60
Detailed Description
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Product Folder Links: MSP430FR5969 MSP430FR59691 MSP430FR5968 MSP430FR5967 MSP430FR5959
MSP430FR5958 MSP430FR5957 MSP430FR5949 MSP430FR5948 MSP430FR5947 MSP430FR59471