AMC7834 Datasheet, PDF (72/93 Pages) Texas Instruments – AMC7834 12-Bit Integrated Power-Amplifier Monitor and Control System with Temperature, Current and Voltage Supervision Capabilities

AMC7834
SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016
www.ti.com
7.6.11 Alarm Threshold Configuration: Address 0x40 through 0x4F
7.6.11.1 ADCINTn/CSn-Upper-Threshold Register (address = 0x40, 0x42, 0x44 and 0x46) [reset = 0x0FFF]
This register description applies to the upper threshold alarm registers for ADCINT1/CS1 through ADCINT4/CS4.
Figure 94. ADCINTn/CSn-Upper-Threshold Register (R/W)
15
7
Bit
15
11–0
14
13
12
11
10
9
8
Reserved
ADCINT-CSn-UP-THRESH[11:8]
R/W-0h
R/W-Fh
6
5
4
3
2
1
0
ADCINT-CSn-UP-THRESH[7:0]
R/W-FFh
Table 41. ADCINTn/CSn-Upper-Threshold Register Field Descriptions
Field
Reserved
ADCINT-CSn-UP-THRESH[11:0]
Type
R/W
R/W
Reset
0000
0xFFF
Description
Reserved for factory use.
Sets the 12-bit upper threshold value for the internal ADC n
(closed-loop mode) or current sense n (open-loop mode) alarm
in straight binary format as determined by the ADCINT/CS-
SELECT bit in register 0x1B.
7.6.11.2 ADCINTn/CSn-Lower-Threshold Register (address = 0x41, 0x43, 0x45 and 0x47) [reset = 0x0000]
This register description applies to the lower threshold alarm registers for ADCINT1/CS1 through ADCINT4/CS4.
Figure 95. ADCINTn/CSn-Lower-Threshold Register (R/W)
15
14
13
12
11
10
9
8
Reserved
ADCINT-CSn-LOW-THRESH[11:8]
R/W-0h
R/W-0h
7
6
5
4
3
2
1
0
ADCINT-CSn-LOW-THRESH[7:0]
R/W-00h
Bit
15
11–0
Table 42. ADCINTn/CSn-Lower-Threshold Register Field Descriptions
Field
Reserved
ADCINT-CSn-LOW-THRESH[11:0]
Type
R/W
R/W
Reset
0000
0x000
Description
Reserved for factory use.
Sets the 12-bit lower threshold value for the internal ADC n
(closed-loop mode) or current sense n (open-loop mode) alarm
in straight binary format.
72
Submit Documentation Feedback
Product Folder Links: AMC7834
Copyright © 2014–2016, Texas Instruments Incorporated