AMC7834 Datasheet, PDF (49/93 Pages) Texas Instruments – AMC7834 12-Bit Integrated Power-Amplifier Monitor and Control System with Temperature, Current and Voltage Supervision Capabilities

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Serial Interface
Closed Loop Register
Closed Loop Settling
Time Register
Closed Loop
Register
Slew-Rate
Control
+
ADC
Integrator
AMC7834
SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016
Current-Sense
Amplifier
SENSE+
SENSE-
VDRAIN
R(SENSE)
I(DRAIN)
Bipolar DAC
RC
Filter
PA FET
Figure 64. AMC7834 Closed-Loop Current Controller
Each of the four digital control loops consists of a digital integrator and a bipolar DAC in the forward path to drive
the gate of a PA FET. A high-side current-sense amplifier in the feedback path senses the drain bias current and
its output is converted by the device ADC.
As with the DACs in open-loop operation, the closed-loop current controllers can be set to clamp mode. When a
current-controller goes into clamp mode the bipolar DAC output is immediately set to its corresponding clamp
voltage and current-sense conversions are stopped. Note that with the exception of the current-sense inputs all
other monitoring inputs continue to be converted by the device ADC while in clamp mode. Clamping does not
clear the closed-loop state making it possible to return to the same voltage being output before the clamp event
was issued.
Since the drain current does not immediately update in response to the out-of-clamp gate voltage, it is
recommended to stop the ADC conversion prior to leaving the clamp state and re-starting conversion only after
the drain current has stabilized. The stabilization time is dependent on the filtering at the bipolar DAC output and
the PA FET characteristics.
The target drain current is set by the Closed Loop registers (address 0x38 to 0x3B) and is given by Equation 10.
I_(DRAIN)
CLOSEDLOOPn >11: 0@ u V_ref
R _SENSE u 51200
where
• I_(DRAIN) is the PA drain current (in Amperes)
• CLOSEDLOOPn[11:0] is the 12-bit digital code that is input to the control loop to set I_(DRAIN)
• V_ref is the device reference voltage
• R_(SENSE) is the sense resistor resistance (in Ohms)
(10)
The control loop sets the target drain current by continuously maintaining a constant voltage across the shunt
resistor (V_(SENSE) = I_(DRAIN) × R_(SENSE)). The control loop continuously attempts to zero-out the error at the input of
the integrator by adjusting the DAC output voltage and consequently keeping the drain current constant.
Assuming negligible drift in the sense resistor, any variation in the drain current due to changes in the PA FET
characteristics over time and temperature are automatically tracked and corrected.
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