AMC7834 Datasheet, PDF (61/93 Pages) Texas Instruments – AMC7834 12-Bit Integrated Power-Amplifier Monitor and Control System with Temperature, Current and Voltage Supervision Capabilities

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AMC7834
SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016
7.6.4.2 SLEEP1 Configuration Register (address = 0x18) [reset = 0xFF00]
Figure 78. SLEEP1 Configuration Register (R/W)
15
Reserved
R/W-1
14
PAON-
SNOOZE1
R/W-1
13
AUXDAC4-
SNOOZE1
R/W-1
12
AUXDAC3-
SNOOZE1
R/W-1
11
AUXDAC2-
SNOOZE1
R/W-1
10
AUXDAC1-
SNOOZE1
R/W-1
9
DAC34-
SNOOZE1
R/W-1
8
DAC12-
SNOOZE1
R/W-1
7
Reserved
R/W-0
6
PAON-SLEEP1
R/W-0
5
AUXDAC4-
SLEEP1
R/W-0
4
AUXDAC3-
SLEEP1
R/W-0
3
AUXDAC2-
SLEEP1
R/W-0
2
AUXDAC1-
SLEEP1
R/W-0
1
DAC34-
SLEEP1
R/W-0
0
DAC12-
SLEEP1
R/W-0
Table 25. SLEEP1 Configuration Field Descriptions
Bit Field
15
Reserved
14
PAON-SNOOZE1
13
AUXDAC4-SNOOZE1
12
AUXDAC3-SNOOZE1
11
AUXDAC2-SNOOZE1
10
AUXDAC1-SNOOZE1
9
DAC34-SNOOZE1
8
DAC12-SNOOZE1
7
Reserved
6
PAON-SLEEP1
5
AUXDAC4-SLEEP1
4
AUXDAC3-SLEEP1
3
AUXDAC2-SLEEP1
2
AUXDAC1-SLEEP1
1
DAC34-SLEEP1
0
DAC12-SLEEP1
Type
R/W
R/W
Reset
1
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Description
Reserved for factory use.
Setting this bit to 1 imposes an additional write to the PA_ON
register to set the PA_ON pin to the ON state after clearing the
SLEEP1 pin.
Setting this bit to 0 enables the SLEEP1 pin to set the PA_ON
pin to the ON state directly.
Setting any of these bits to 1 imposes an additional write to the
CLAMP Configuration register to wake-up the corresponding
DAC or DAC pair from clamp after clearing the SLEEP1 pin.
Clearing any of these bits to 0 enables the SLEEP1 pin to wake-
up the DAC or DAC pairs directly.
Reserved for factory use
Setting this bit to 1 allows control of the PA_ON pin through the
SLEEP1 pin. When SLEEP1 pin goes high the PA_ON pin
enters the OFF state.
Bringing the SLEEP1 pin low is required but not necessarily
sufficient to return the PA_ON pin to the ON state as determined
by the SNOOZE bits.
Setting this bit to 0 causes the PA_ON pin to be unaffected by
the SLEEP1 pin.
Setting any of these bits to 1 allows control of the corresponding
DAC or DAC pair through the SLEEP1 pin. When SLEEP1 pin
goes high the DAC or DAC pair goes into clamp mode.
Bringing the SLEEP1 pin low is required but not necessarily
sufficient to return the DAC or DAC pairs to normal operation as
determined by the SNOOZE bits.
Clearing any of these bits to 0 causes the corresponding DAC or
DAC pair to be unaffected by the SLEEP1 pin.
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