AMC7834 Datasheet, PDF (40/93 Pages) Texas Instruments – AMC7834 12-Bit Integrated Power-Amplifier Monitor and Control System with Temperature, Current and Voltage Supervision Capabilities

AMC7834
SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016
www.ti.com
7.3.6 Programmable Out-of-Range Alarms
The AMC7834 device is capable of continuously analyzing the four internal ADC monitoring inputs (bipolar DAC-
output monitoring), current sensors, temperature sensors, and negative supply for normal operation.
Normal operation is established through the lower and upper threshold registers (address 0x40 through 0x4D).
When any of the monitored inputs is out of the specified range, an alarm event is issued and the global alarm bit,
GALARM in the General Status register (address 0x1F), is set (see Figure 54). The alarm status register
(address 0x1E) indicates the source of the alarm event.
DAC4 High Alarm
DAC3 High Alarm
DAC2 High Alarm
DAC1 High Alarm
RESERVED
AV_SS Alarm
RT2 High Alarm
RT2 Low Alarm
RT1 High Alarm
RT1 Low Alarm
LT High Alarm
LT Low Alarm
ADCINT4/CS4 Alarm
ADCINT3/CS3 Alarm
ADCINT2/CS2 Alarm
ADCINT1/CS1 Alarm
15
14
13
12
11
10
9
8
ALARM STATUS
0x1E
7
6
5
4
3
2
1
0
GALARM
Figure 54. AMC7834 Alarm Status Register
The ALARM-LATCH-DIS bit in the ALARMOUT configuration register (address 0x1B) sets the latching behavior
for all alarms. When the ALARM-LATCH-DIS bit is cleared to 0 the alarm bits in the alarm status register are
latched. The alarm bits are referred to as being latched because the bits remain set until read by software. This
design ensures that out-of-limit events cannot be missed if the software is periodically polling the device. All bits
are cleared when reading the alarm status register, and all bits are reasserted if the out-of limit condition still
exists on the next monitoring cycle, unless otherwise noted. When the ALARM-LATCH-DIS bit is set to 1, the
alarm bits are not latched. The alarm bits in the alarm status register are set to 0 when the error condition
subsides, regardless of whether the bit is read or not.
All of the alarms can be set to activate the ALARMOUT pin. The ALARMOUT pin is an open-drain pin and
therefore an external pullup resistor to a voltage no higher than that of the AV_DD pin is required. The ALARMOUT
output polarity is defined through the ALARMOUT-POLARITY bit in the ALARMOUT configuration register
(address 0x1B). The default polarity is active low (ALARMOUT-POLARITY = 0). The polarity can be changed to
active high by setting the ALARMOUT-POLARITY bit to 1. The ALARMOUT pin works as an interrupt to the host
so that it can query the alarm status register to determine the alarm source. Any alarm event can activate the pin
as long as the alarm is not masked in the ALARMOUT configuration register. When an alarm event is masked,
the occurrence of the event sets the corresponding status bit in the alarm status register, but does not activate
the ALARMOUT pin.
40
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