LM3S1637 Datasheet, PDF (640/696 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 19-7. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
GND
B6
-
Power Ground reference for logic and I/O pins.
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDA
A5
-
Power The ground reference for the analog circuits (ADC,
B5
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
Power
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
VDD25
C3
-
Power Positive supply for most of the logic function,
D3
including the processor core and most peripherals.
F3
G3
VDD33
E10
-
Power Positive supply for I/O and some logic.
G10
G11
G12
H10
K7
K8
K9
VDDA
C6
-
Power The positive supply for the analog circuits (ADC,
C7
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in “Recommended DC Operating
Conditions” on page 645, regardless of system
implementation.
IDX0
F1
I
TTL
QEI module 0 index.
QEI
PhA0
L1
I
TTL
QEI module 0 phase A.
PhB0
L2
I
TTL
QEI module 0 phase B.
SSI0Clk
M4
I/O
TTL
SSI module 0 clock
SSI0Fss
L4
I/O
TTL
SSI module 0 frame signal
SSI
SSI0Rx
L5
I
TTL
SSI module 0 receive
SSI0Tx
M5
O
TTL
SSI module 0 transmit
640
June 18, 2012
Texas Instruments-Production Data