LM3S1637 Datasheet, PDF (622/696 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Signal Tables
Table 19-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
Fault
99
I
TTL
PWM Fault.
GND
9
-
Power Ground reference for logic and I/O pins.
15
21
33
39
45
54
57
63
69
82
87
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC, Analog
97
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
HIB
I2C0SCL
I2C0SDA
51
O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
70
I/O
OD
I²C module 0 clock.
71
I/O
OD
I²C module 0 data.
IDX0
100
I
TTL
QEI module 0 index.
LDO
7
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
NC
16
-
-
No connect. Leave the pin electrically unconnected/isolated.
36
37
40
41
42
43
46
58
74
75
83
84
OSC0
48
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
49
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
PA0
26
I/O
TTL
GPIO port A bit 0.
PA1
27
I/O
TTL
GPIO port A bit 1.
PA2
28
I/O
TTL
GPIO port A bit 2.
PA3
29
I/O
TTL
GPIO port A bit 3.
PA4
30
I/O
TTL
GPIO port A bit 4.
PA5
31
I/O
TTL
GPIO port A bit 5.
PA6
34
I/O
TTL
GPIO port A bit 6.
622
June 18, 2012
Texas Instruments-Production Data