LM3S1637 Datasheet, PDF (22/696 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Table of Contents
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I²C Master Control/Status (I2CMCS), offset 0x004 ........................................................... 526
I²C Master Data (I2CMDR), offset 0x008 ......................................................................... 530
I²C Master Timer Period (I2CMTPR), offset 0x00C ........................................................... 531
I²C Master Interrupt Mask (I2CMIMR), offset 0x010 ......................................................... 532
I²C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ................................................. 533
I²C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 534
I²C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 535
I²C Master Configuration (I2CMCR), offset 0x020 ............................................................ 536
I²C Slave Own Address (I2CSOAR), offset 0x800 ............................................................ 538
I²C Slave Control/Status (I2CSCSR), offset 0x804 ........................................................... 539
I²C Slave Data (I2CSDR), offset 0x808 ........................................................................... 541
I²C Slave Interrupt Mask (I2CSIMR), offset 0x80C ........................................................... 542
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x810 ................................................... 543
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x814 .............................................. 544
I²C Slave Interrupt Clear (I2CSICR), offset 0x818 ............................................................ 545
Analog Comparator ..................................................................................................................... 546
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 551
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 552
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 553
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 554
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 555
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 556
Pulse Width Modulator (PWM) .................................................................................................... 558
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 568
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 569
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 570
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 571
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 572
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 573
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 574
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 575
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 576
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 577
Register 11: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 577
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 577
Register 13: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 579
Register 14: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 579
Register 15: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 579
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 582
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 582
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 582
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 583
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 583
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 583
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 584
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 584
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 584
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June 18, 2012
Texas Instruments-Production Data