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LM3S1637 Datasheet, PDF (624/696 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark
Signal Tables
Table 19-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Typea Description
PWM3
85
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
PWM4
72
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
PWM5
73
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
RST
64
I
TTL
System reset input.
SSI0Clk
28
I/O
TTL
SSI module 0 clock
SSI0Fss
29
I/O
TTL
SSI module 0 frame signal
SSI0Rx
30
I
TTL
SSI module 0 receive
SSI0Tx
31
O
TTL
SSI module 0 transmit
SWCLK
80
I
TTL
JTAG/SWD CLK.
SWDIO
79
I/O
TTL
JTAG TMS and SWDIO.
SWO
77
O
TTL
JTAG TDO and SWO.
TCK
80
I
TTL
JTAG/SWD CLK.
TDI
78
I
TTL
JTAG TDI.
TDO
77
O
TTL
JTAG TDO and SWO.
TMS
79
I/O
TTL
JTAG TMS and SWDIO.
TRST
89
I
TTL
JTAG TRST.
U0Rx
26
I
TTL
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
U0Tx
27
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
U1Rx
12
I
TTL
UART module 1 receive. When in IrDA mode, this signal has
IrDA modulation.
U1Tx
13
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has
IrDA modulation.
U2Rx
19
I
TTL
UART module 2 receive. When in IrDA mode, this signal has
IrDA modulation.
U2Tx
18
O
TTL
UART module 2 transmit. When in IrDA mode, this signal has
IrDA modulation.
VBAT
55
-
Power Power source for the Hibernation module. It is normally
connected to the positive terminal of a battery and serves as
the battery backup/Hibernation module power-source supply.
VDD
8
-
Power Positive supply for I/O and some logic.
20
32
44
56
68
81
93
VDD25
14
-
Power Positive supply for most of the logic function, including the
38
processor core and most peripherals.
62
88
624
June 18, 2012
Texas Instruments-Production Data