LM3S1637 Datasheet, PDF (19/696 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1637 Microcontroller
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GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 302
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 303
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 304
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 305
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 307
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 308
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 309
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 310
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 311
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 312
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 313
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 314
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 315
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 316
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 318
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 319
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 320
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 321
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 322
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 323
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 324
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 325
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 326
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 327
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 328
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 329
General-Purpose Timers ............................................................................................................. 330
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 343
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 344
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 346
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 348
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 351
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 353
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 354
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 355
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 357
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 358
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 359
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 360
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 361
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 362
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 363
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 364
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 365
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 366
Watchdog Timer ........................................................................................................................... 367
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 371
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 372
June 18, 2012
19
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