DS90UB926Q Datasheet, PDF (48/57 Pages) Texas Instruments – 5 - 85 MHz 24-bit Color FPD-Link III Deserializer with Bidirectional Control Channel

DS90UB926Q
FIGURE 20. White Balance LUT Configurations
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TABLE 10. White Balance Register Table
PAG
E
0
1
2
3
ADD
(dec)
42
ADD
(hex)
0x2A
Register Name
White Balance
Control
0 – 00 – FF White Balance
255
Red LUT
0 – 00 – FF White Balance
255
Green LUT
0 – 00 – FF White Balance
255
Blue LUT
Bit(s) Access Default
(hex)
Function
7:6 RW 0x00 Page Setting
5
RW
4
RW
3:0
FF:0 RW
FF:0 RW
FF:0 RW
White Balance
Enable
N/A
Red LUT
N/A Green LUT
N/A
Blue LUT
Description
00: Configuration Registers
01: Red LUT
10: Green LUT
11: Blue LUT
0: White Balance Disable
1: White Balance Enable
0: Reload Disable
1: Reload Enable
Reserved
256 8–bit entries to be applied to the Red
subpixel data
256 8–bit entries to be applied to the
Green subpixel data
256 8–bit entries to be applied to the Blue
subpixel data
ADAPTIVE HI-FRC DITHERING
The Adaptive FRC Dithering Feature delivers product-differentiating image quality. It reduces 24-bit RGB (8 bits per subpixel) to
18-bit RGB (6 bits per sub-pixel), smoothing color gradients, and allowing the flexibility to use lower cost 18-bit displays. FRC
(Frame Rate Control) dithering is a method to emulate “missing” colors on a lower color depth LCD display by changing the pixel
color slightly with every frame. FRC is achieved by controlling on and off pixels over multiple frames (Temporal). Static dithering
regulates the number of on and off pixels in a small defined pixel group (Spatial). The FRC module includes both Temporal and
Spatial methods and also Hi-FRC. Conventional FRC can display only 16,194,277 colors with 6-bit RGB source. “Hi-FRC” enables
full (16,777,216) color on an 18-bit LCD panel. The “adaptive” FRC module also includes input pixel detection to apply specific
Spatial dithering methods for smoother gray level transitions. When enabled, the lower LSBs of each RGB output are not active;
only 18 bit data (6 bits per R,G and B) are driven to the display. This feature is enabled via serial control bus register.
Two FRC functional blocks are available, and may be independently enabled. FRC1 precedes the white balance LUT, and is
intended to be used when 24-bit data is being driven to an 18-bit display with a white balance LUT that is calibrated for an 18-bit
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