LP3907 Datasheet, PDF (45/58 Pages) National Semiconductor (TI) – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface

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LP3907
SNVS511S – JUNE 2007 – REVISED APRIL 2016
T_J-MAX-OP = T_A-MAX + (R_θJA) [°C/ Watt] × (P_D-MAX) [Watts]
(12)
Total device power dissipation P_D-MAX is the sum of the individual power dissipation of the four regulators plus a
minor amount for chip overhead. Chip overhead is Bias, TSD, and LDO analog.
P_D-MAX = P_LDO1 + P_LD02 + P_BUCK1 + P_BUCK2 + (0.0001A × V_IN) [Watts].
(13)
Power dissipation of LDO1:
P_LDO1 = (V_INLDO1 – V_OUTLDO1) × I_OUTLDO1 [V × A]
(14)
Power dissipation of LDO2:
P_LDO2 = (V_INLDO2 – V_OUTLDO2) × I_OUTLDO2 [V × A]
(15)
Power dissipation of Buck1:
P_Buck1 = P_IN – P_OUT = V_OUTBuck1 × I_OUTBuck1 × (1 – η₁) / η₁ [V × A]
where
• η₁ = efficiency of buck 1
(16)
Power dissipation of Buck2:
P_Buck2 = P_IN – P_OUT = V_OUTBuck2 × I_OUTBuck2 × (1 – η₂) / η₂ [V × A]
where
• η₂ = efficiency of Buck2
where
• η is the efficiency for the specific condition taken from efficiency graphs.
(17)
9.2.3 Application Curves
100
90
80
70
60
50
40
30
20
10
0.1
V_OUT = 2 V
V_IN = 2.8V
V_IN = 3.6V
V_IN = 5.5V
1
10
100
OUTPUT CURRENT (mA)
L= 2.2 µH
1000
Figure 47. Efficiency vs Output Current
(Forced PWM Mode)
100
90
V_IN= 4.5V
80
V_IN= 5.5V
70
60
50
40
0.1
V_OUT = 2 V
1
10
100
OUTPUT CURRENT (mA)
L= 2.2 µH
1000
Figure 48. Efficiency vs Output Current
(PWM-to-PFM Mode)
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