LP3907 Datasheet, PDF (31/58 Pages) National Semiconductor (TI) – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface

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8.6.1.3 EN_DLY Preset Delay Sequence After EN_T Assertion
LP3907
SNVS511S – JUNE 2007 – REVISED APRIL 2016
EN_DLY<2:0>
000
001
010
011
100
101
110
111
BUCK1
1
1
1.5
1.5
1.5
1.5
3
2
BUCK2
1
1.5
2
2
2
1.5
2
3
DELAY (ms)
LDO1
1
2
3
1
3
2
1
6
LDO2
1
2
6
1
6
2
1.5
11
8.6.1.4 Buck and LDO Output Voltage Enable Register (BKLDOEN) – 0x10
This register controls the enables for the Bucks and LDOs.
Name
Access
Data
Reset
D7
—
—
Reserved
0
D6
LDO2EN
R/W
0 – Disable
1 – Enable
1
D5
—
—
Reserved
1
D4
LDO1EN
R/W
0 – Disable
1 – Enable
1
D3
—
—
Reserved
0
D2
BK2EN
R/W
0 – Disable
1 – Enable
1
D1
—
—
Reserved
0
D0
BK1EN
R/W
0 – Disable
1 – Enable
1
8.6.1.5 Buck and LDO Status Register (BKLDOSR) – 0x11
This register monitors whether the Bucks and LDOs meet the voltage output specifications.
Name
Access
Data
Reset
D7
D6
BKS_OK
LDOS_OK
R
R
0 – Buck 1-2 0 – LDO 1-2
Not Valid
Not Valid
1 – Bucks Valid 1 – LDOs Valid
0
0
D5
LDO2_OK
R
0 – LDO2 Not
Valid
1 – LDO2 Valid
0
D4
LDO1_OK
R
0 – LDO1 Not
Valid
1 – LDO1 Valid
0
D3
—
—
Reserve
d
0
D2
D1
BK2_OK
—
R
—
0 – Buck2 Not Reserve
Valid
d
1 – Buck2 Valid
0
0
D0
BK1_OK
R
0 – Buck1 Not
Valid
1 – Buck1 Valid
0
8.6.1.6 Buck Voltage Change Control Register 1 (VCCR) – 0x20
This register selects and controls the output target voltages for the buck regulators.
Name
Access
Data
D7-6
—
—
Reserved
Reset 00
D5
B2VS
R/W
Buck2 Target Voltage
Select
0 – B2VT1
1 – B2VT2
0
D4
B2GO
R/W
Buck2 Voltage Ramp
CTRL
0 – Hold
1 – Ramp to B2VS
selection
0
D3-2
—
—
Reserved
00
D1
B1VS
R/W
Buck1 Target Voltage
Select
0 – B1VT1
1 – B1VT2
0
D0
B1GO
R/W
Buck1 Voltage Ramp
CTRL
0 – Hold
1 – Ramp to B1VS
selection
0
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