BQ25120A Datasheet, PDF (39/67 Pages) Texas Instruments – Low IQ Highly Integrated Battery Charge Management Solution for Wearables and IoT

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bq25120A
SLUSD08 – MAY 2017
9.6.4 Fast Charge Control Register
Memory location 0x03h, Reset State: 0001 0100 (bq25120A)
Figure 28. Fast Charge Control Register
7 (MSB)
6
5
4
3
2
1
0 (LSB)
0
0
0
1
0
1
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15. Fast Charge Control Register
Bit Field
Type
Reset
Description
B7 (MSB) ICHRG_RANGE
R/W
0
0 – to select charge range from 5 mA to 35 mA, ICHRG bits are
1-mA steps
1 – to select charge range from 40 mA to 300 mA, ICHRG bits
are 10-mA steps
B6
ICHRG_4
R/W
0
Charge current 16 mA or 160 mA
B5
ICHRG_3
R/W
0
Charge current 8 mA or 80 mA
B4
ICHRG_2
R/W
1
Charge current 4 mA or 40 mA
B3
ICHRG_1
R/W
0
Charge current 2 mA or 20 mA
B2
ICHRG_0
R/W
1
Charge current 1 mA or 10 mA
B1
CE
R/W
0
0 – Charger enabled
1 – Charger is disabled
B0 (LSB) HZ_MODE
R/W
0
0 – Not high impedance mode
1 – High impedance mode
ICHRG_RANGE and ICHRG bits are used to set the charge current. The I_CHRG is calculated using the following equation: If
ICHRG_RANGE is 0, then I_CHRG = 5 mA + I_CHRGCODE x 1 mA. If ICHRG_RANGE is 1, then I_CHRG = 40 mA + I_CHRGCODE x 10 mA. If a
value greater than 35 mA (ICHRG_RANGE = 0) or 300 mA (ICHRG_RANGE = 1) is written, the setting goes to 35 mA or 300 mA
respectively except if the ICHRG bits are all 1 (that is, 11111), then the externally programmed value is used. The PRETERM bits must also
be set prior to writing all 1s to ensure the external ISET current is used as well as the proper termination and pre-charge values are used.
For IPRETERM = 5%, set the IPRETERM bits to 000001, for IPRETERM = 10%, set the IPRETERM bits to 000010, for IPRETERM = 15%,
set the IPRETERM bits to 000100, and for IPRETERM = 20%, set the iPRETERM bits to 001000. The default may be overridden by the
external resistor on ISET.
Copyright © 2017, Texas Instruments Incorporated
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