BQ25120A Datasheet, PDF (12/67 Pages) Texas Instruments – Low IQ Highly Integrated Battery Charge Management Solution for Wearables and IoT

bq25120A
SLUSD08 – MAY 2017
8.6 Timing Requirements
POWER-PATH MANAGEMENT AND INPUT CURRENT LIMIT
t_{DGL_SC}
Deglitch Time, PMID or SW Short Circuit
during Discharge Mode
t_{REC_SC}
Recovery time, OUT Short Circuit during
Discharge Mode
BATTERY CHARGER
t_{DGL_SHORT}
Deglitch time transition from ISET short to
I_(CHARGE) disable
BATTERY CHARGING TIMERS
Clear fault by disconnecting VIN
t_MAXCHG
Charge safety timer
t_PRECHG
Precharge safety timer
SYS OUTPUT
Programmable range
t_ONMIN
t_OFFMIN
t_{START_SW}
Minimum ON time
Minimum OFF time
SW start up time
V_IN = 3.6 V, V_OUT = 2V, I_OUT = 0 mA
V_IN = 4.2 V
V_IN = 5 V, from write on EN_SW_OUT
until output starts to rise
t_{START_SYS}
SYS output time to start switching
t_SOFTSTART
Softstart time with reduced current limit
LS/LDO OUTPUT
From insertion of BAT > V_(BUVLO) or V_IN
> V_(UVLO)
t_{ON_LDO}
Turn ON time
t_{OFF_LDO}
Turn OFF time
PUSHBUTTON TIMER
100mA load
100mA load
t_WAKE1
t_RESET
Push button timer wake 1
Push button timer reset
Programmable Range for reset
function
t_{RESET_D}
t_DD
Reset pulse duration
Detection delay (from MR, input to
RESET)
For 0s condition
BATTERY-PACK NTC MONITOR
t_DGL(TS)
Deglitch time on TS change
I2C INTERFACE
Applies to V_(HOT), V_(WARM), V_(COOL), and
V_(COLD)
t_WATCHDOG
t_I2CRESET
t_{HIZ_ACTIVEBAT}
I2C interface reset timer for host
I2C interface inactive reset timer
Transition time required to enable the I2C
interface from HiZ to Active BAT
INPUT PIN
t_{/CD_DGL}
t_QUIET
Deglitch for CD
Input quiet time for Ship Mode transition
CD rising/falling
MIN
TYP
250
2
1
2
0.1 x t_MAXCHG
225
50
5
350
400
500
5
0.08
5
400
6
50
50
700
100
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MAX UNIT
µs
s
ms
540
min
ns
ns
25
ms
µs
1200
µs
µs
µs
1
s
15
s
ms
µs
ms
s
ms
1
ms
µs
1
ms
12
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