BQ25120A Datasheet, PDF (22/67 Pages) Texas Instruments – Low IQ Highly Integrated Battery Charge Management Solution for Wearables and IoT

bq25120A
SLUSD08 – MAY 2017
www.ti.com
9.3.7 Input Overvoltage Protection and Undervoltage Status Indication
The input overvoltage protection protects the device and downstream components connected to PMID, SYS, and
BAT against damage from overvoltage on the input supply. When V_IN > V_OVP an OVP fault is determined to exist.
During the OVP fault, the device turns the battery discharge FET on, sends a single 128-µs pulse on INT, and
the FAULT bits are updated over I²C. Once the OVP fault is removed, after the deglitch time, t_{DGL_OVP}, STAT and
FAULT bits are cleared and the device returns to normal operation. The FAULT bits are not cleared until they are
read in from I²C after the OVP condition no longer exists. The OVP threshold for the device is set to operate from
standard USB sources.
The input under-voltage status indication is used to notify the host or other device when the input voltage falls
below a desired threshold. When V_IN < V_UVLO, after the deglitch time t_{DGL_UVLO}, a UVLO fault is determined to
exist. During the V_IN UVLO fault, the device sends a single 128-µs pulse on INT, and the STAT and FAULT bits
are updated over I²C. The FAULT bits are not cleared until they are read in from I²C after the UVLO condition no
longer exists.
9.3.8 Battery Charging Process and Charge Profile
When a valid input source is connected (V_IN > V_UVLO and V_(BAT) + V_SLP < V_IN < V_OVP and V_IN > V_IN(DPM)), the CE
bit in the control register determines whether a charge cycle is initiated. When the CE bit is 1 and a valid input
source is connected, the battery discharge FET is turned off, and the output at SYS is regulated depending on
the output configuration. A charge cycle is initiated when the CE bit is written to a 0. Alternatively, the CD input
can be used to enable and disable charge.
The device supports multiple battery chemistries for single-cell applications. Charging is done through the
internal battery MOSFET. There are several loops that influence the charge current: constant current loop (CC),
constant voltage loop (CV), input current limit, V_DPPM, and V_IN(DPM). During the charging process, all loops are
enabled and the one that is dominant takes control.
The charge current is regulated to I_CHARGE until the voltage between BAT and GND reaches the regulation
voltage. The voltage between BAT and GND is regulated to V_BATREG (CV Mode) while the charge current
naturally tapers down. When termination is enabled, the device monitors the charging current during the CV
mode, and once the charge current tapers down to the termination threshold, I_TERM, and the battery voltage is
above the recharge threshold, the device terminates charge, and turns off the battery charging FET. Termination
is disabled when any loop is active other than CV.
9.3.9 Dynamic Power Path Management Mode
With a valid input source connected, the power-path management circuitry monitors the input voltage and current
continuously. The current into IN is shared at PMID between charging the battery and powering the system load
at PMID, SYS, and LS/LDO. If the sum of the charging and load currents exceeds the current that the VIN can
support, the input DPM loop(VINDPM) reduces the current going into PMID through the input blocking FETs.
This will cause a drop on the PMID voltage if the system demands more current. If PMID drops below the DPPM
voltage threshold(V_DPPM), the charging current is reduced by the DPPM loop through the BATFET in order to
stabilize PMID. If PMID continues to drop after BATFET charging current is reduced to zero, the part enters
supplement mode when PMID falls below the supplement mode threshold. Battery termination is disabled while
in DPPM mode. In order to charge the battery, the voltage at PMID has to be greater than V_BATREG + V_DPPM
threshold..
9.3.10 Battery Supplement Mode
While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at PMID reduces further. When the PMID voltage drops below the
battery voltage by V_(BSUP1), the battery supplements the system load. The battery stops supplementing the
system load when the voltage on the PMID pin rises above the battery voltage by V_(BSUP2). During supplement
mode, the battery supplement current is not regulated, however, the short-circuit protection circuit is active.
Battery termination is disabled while in supplement mode.
22
Submit Documentation Feedback
Product Folder Links: bq25120A
Copyright © 2017, Texas Instruments Incorporated