DS80PCI102_15 Datasheet, PDF (37/46 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 1-Lane PCI-Express Repeater With Equalization and De-Emphasis

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Typical Application (continued)
DS80PCI102
SNLS344G – JULY 2011 – REVISED AUGUST 2015
DS80PCI102 Settings:
EQ[1:0] = [R, R] or 0x15, DEM[1:0] = [Float, Float]
Figure 14. TL1 = 20-Inch 4–Mil FR4 Trace, TL2 = 15-Inch
4–Mil FR4 Trace
DS80PCI102 Settings:
EQ[1:0] = [R, 1] or 0x0F, DEM[1:0] = [Float, Float]
Figure 15. TL1 = 30-Inch 4–Mil FR4 Trace, TL2 = 15-Inch
4–Mil FR4 Trace
9 Power Supply Recommendations
9.1 3.3-V or 2.5-V Supply Mode Operation
The DS80PCI102 has an optional internal voltage regulator to provide the 2.5-V supply to the device. In 3.3-V
mode, the VIN pin = 3.3 V is used to supply power to the device and the VDD pins should be left open. The
internal regulator will provide the 2.5 V to the VDD pins of the device and a 0.1-μF capacitor is needed at each of
the five VDD pins for power supply de-coupling (total capacitance should be ≤ 0.5 µF), and the VDD pins should
be left open. The VDD_SEL pin must be tied to GND to enable the internal regulator. In 2.5-V mode, the VIN pin
should be left open and 2.5-V supply must be applied to the VDD pins. The VDD_SEL pin must be left open (no
connect) to disable the internal regulator.
The DS80PCI102 can be configured for 2.5-V operation or 3.3-V operation. The lists below outline required
connections for each supply selection.
3.3-V Mode of Operation
1. Tie VDD_SEL = 0 with 1-kΩ resistor to GND.
2. Feed 3.3-V supply into VIN pin. Local 1.0-µF decoupling at VIN is recommended.
3. See information on VDD bypass below.
4. SDA and SCL pins should connect pullup resistor to VIN
5. Any 4-Level input which requires a connection to "Logic 1" should use a 1-kΩ resistor to VIN
2.5-V Mode of Operation
6. VDD_SEL = Float
7. VIN = Float
8. Feed 2.5-V supply into VDD pins.
9. See information on VDD bypass below.
10. SDA and SCL pins connect pullup resistor to VDD for 2.5-V uC SMBus IO
11. SDA and SCL pins connect pullup resistor to VDD for 3.3-V uC SMBus IO
12. Any 4-Level input which requires a connection to "Logic 1" should use a 1-kΩ resistor to VIN
NOTE
Note: The DAP (bottom solder pad) is the GND connection.
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