DS80PCI102_15 Datasheet, PDF (17/46 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 1-Lane PCI-Express Repeater With Equalization and De-Emphasis

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DS80PCI102
SNLS344G – JULY 2011 – REVISED AUGUST 2015
7.5.4 Writing a Register
To write a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a 0 indicating a WRITE.
2. The Device (Slave) drives the ACK bit (0).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (0).
5. The Host drive the 8-bit data byte.
6. The Device drives an ACK bit (0).
7. The Host drives a STOP condition.
The WRITE transaction is completed, the bus goes IDLE and communication with other SMBus devices may
now occur.
7.5.5 Reading a Register
To read a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a 0 indicating a WRITE.
2. The Device (Slave) drives the ACK bit (0).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (0).
5. The Host drives a START condition.
6. The Host drives the 7-bit SMBus Address, and a 1 indicating a READ.
7. The Device drives an ACK bit 0.
8. The Device drives the 8-bit data value (register contents).
9. The Host drives a NACK bit 1 indicating end of the READ transfer.
10. The Host drives a STOP condition.
The READ transaction is completed, the bus goes IDLE and communication with other SMBus devices may now
occur.
See Table 10 for more information.
Slave Address
Register Address
Slave Address
Data
S
Device
ID
+
A3
AAA
210
a
0c
k
7 65432 1 0
a
cS
k
Device
ID
+
A3
A
2
A
1
A
0
1
a
a
c 76543210 c P
k
k
Figure 7. Typical SMBus Write Operation
7.5.6 EEPROM Programming
The DS80PCI102 supports reading directly from an external EEPROM device by implementing SMBus Master
mode. When using the SMBus master mode, the DS80PCI102 will read directly from specific location in the
external EEPROM. When designing a system for using the external EEPROM, the following guidelines should be
followed:
• Set the DS80PCI102 into SMBus Master Mode.
– ENSMB (PIN 3) = Float
• The external EEPROM device must support 1-MHz operation.
• The external EEPROM device address byte must be 0xA0.
• Set the AD[3:0] inputs for SMBus address byte. When the AD[3:0] = 0000'b, the device address byte is 0xB0.
• The device address can be set with the use of the AD[3:0] input up to 16 different addresses. Use the
example below to set each of the SMBus addresses.
– AD[3:0] = 0001'b, the device address byte is 0xB2
– AD[3:0] = 0010'b, the device address byte is 0xB4
– AD[3:0] = 0011'b, the device address byte is 0xB6
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