DS80PCI102_15 Datasheet, PDF (10/46 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 1-Lane PCI-Express Repeater With Equalization and De-Emphasis

DS80PCI102
SNLS344G – JULY 2011 – REVISED AUGUST 2015
6.6 Timing Diagrams
VOD = [Out+ - Out-]
80%
0V
20%
80%
20%
t_RISE
t_FALL
Figure 1. CML Output and Rise and Fall Times
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+
IN
0V
-
t_PLHD
+
OUT
0V
-
t_PHLD
Figure 2. Propagation Delay Timing Diagram
+
IN
DATA
0V
-
t_IDLE-DATA
+
t_DATA-IDLE
OUT
DATA
0V
-
IDLE
IDLE
Figure 3. Transmit IDLE-DATA and DATA-IDLE Response Time
t_LOW
t_R
t_HIGH
t_BUF
t_HD:STA
t_HD:DAT
t_F
t_SU:DAT
t_SU:STA
t_SU:STO
SP
ST
ST
SP
Figure 4. SMBus Timing Parameters
SCL
SDA
10
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