DS80PCI102_15 Datasheet, PDF (35/46 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 1-Lane PCI-Express Repeater With Equalization and De-Emphasis

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8 Application and Implementation
DS80PCI102
SNLS344G – JULY 2011 – REVISED AUGUST 2015
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
In PCIe Gen-3 applications, the specification requires Rx-Tx link training to establish and optimize signal
conditioning settings at 8 Gbps. In link training, the Rx partner requests a series of FIR - preshoot and de-
emphasis coefficients (10 Presets) from the Tx partner. The Rx partner includes 7-levels (6 dB to 12 dB) of CTLE
followed by a single tap DFE. The link training would pre-condition the signal with an equalized link between the
root-complex and endpoint. Note that there is no link training in PCIe Gen-1 (2.5 Gbps) or PCIe Gen-2 (5.0
Gbps) applications. The DS80PCI102 is placed in between the Tx and Rx. It would help extend the PCB trace
reach distance by boosting the attenuated signals with it's equalization, so that the signal can be more easily
recovered by the downstream Rx. In Gen 3 mode, DS80PCI102 transmit outputs are designed to pass the Tx
Preset signaling onto the Rx for the PCIe Gen 3 link to train and optimize the equalization settings. The
suggested setting for the DS80PCI102 are EQ = 0x00, VOD = 1.2 Vp-p and DEM = 0 dB. Additional adjustments
to increase the EQ or DEM setting should be performed to optimize the eye opening in the Rx partner. See the
tables below for Pin Mode and SMBus Mode configurations.
Channel
EQx[1:0]
DEMx
Table 11. Suggested Device Settings in Pin Mode
Pin Mode Settings
0, 0 (Level 1)
Float, R (Level 10)
Register
0x06
0x0F
0x25
0x11
0x16
0x2D
0x18
Table 12. Suggested Device Settings in SMBus Slave Mode
Write Value
0x18
0x00
0xAD
0x00
0x00
0xAD
0x00
Comments
Enables SMBus Slave Mode Register Control
Set CHA EQ to 0x00.
Set CHA VOD to 101'b (1.2 Vp-p).
Set CHA DEM to 000'b (0 dB).
Set CHB EQ to 0x00.
Set CHB VOD to 101'b (1.2 Vp-p).
Set CHB DEM to 000'b (0 dB).
8.2 Typical Application
The DS80PCI102 extends PCB trace and cable reach in PCIe Gen1, 2 and 3 applications by applying
equalization to compensate for the insertion loss of the trace or cable. In Gen 3 mode, the device aids
specifically in the equalization link training to improve the margin and overall eye inside the Rx. The DS80PCI102
can be used on the motherboard, mid plane (riser card), end-point target cards, and active cable assemblies.
The capability of the DS80PCI102 performance is shown in the following two test setup connections.
Pattern
Generator
V_ID = 1.0 Vp-p,
DE = 0 dB
8 Gb/s, PRBS23
TL
Lossy Channel
IN DS80PCI102 OUT
Figure 10. Test Setup Connections Diagram
Scope
BW = 50 GHz
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Product Folder Links: DS80PCI102
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