DS90UA102-Q1 Datasheet, PDF (36/46 Pages) Texas Instruments – DS90UA102-Q1 Multi-Channel Digital Audio Link

DS90UA102-Q1
SNLS442A – JULY 2013 – REVISED SEPTEMBER 2013
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Clock-Data Recovery Status Flag (LOCK), Output Enable (OEN) and Output State Select
(OSS_SEL)
When PDB is driven HIGH, the Deserializer’s CDR PLL begins locking to the serial input. After the DS90UA102-
Q1 completes its LOCK sequence to the input serial data, the LOCK output is driven HIGH, indicating valid data
and clock have been recovered from the serial input and are available on the parallel bus and SCK outputs. The
states of the outputs are based on the serial interface input to the Deserializer, OEN, and OSS_SEL setting as
shown below (Table 5). See Figure 11.
Serial Interface PDB
Input to DES
X
0
X
1
X
1
Static
1
Inputs
OEN
X
0
0
1
Static
1
1
Active
1
1
Active
1
1
(1) X: Don't Care.
(2) Z: TRI-STATE.
Table 5. Output States⁽¹⁾⁽²⁾
OSS_SEL
X
0
1
0
LOCK
Z
L or H
L or H
L
PASS
Z
L
Z
L
1
L
H
0
H
L
1
H
Valid
Outputs
DATA
Z
L
Z
L
L
L
Valid
SCK
Z
L
Z
L/Internal Oscillator
(Register bit enable
0x02[5])
L
L
Valid
Deserializer – Adaptive Input Equalization(AEQ)
The receiver inputs provide an adaptive input equalization filter in order to compensate for signal degradation
from the interconnect components. The level of equalization can also be manually selected via register controls.
The equalized output can be seen using the CMLOUTP/CMLOUTN pins on the Deserializer.
There are limits to the amount of loss that can be compensated. These limits are defined by the gain curve of the
equalizer shown in Figure 28. This figure illustrates the maximum allowable interconnect loss for coax/STP cable
with the equalizer at various gain settings. In order to determine the maximum cable reach, other factors that
affect signal integrity such as jitter, skew, ISI, crosstalk, etc. need to be taken into consideration.
25
20
15
DES Equalizer Gain (dB)
10
5
0
100 200 300 400 500 600 700
SERIAL LINE FREQUENCY (MHz)
VOD-Vswing Loss - STP
VOD-Vswing Loss - COAX
Allowable Interconnect
Loss - STP
Allowable Interconnect
Loss - COAX
Figure 28. Maximum Equalizer Gain vs. Line Frequency (STP)
EMI Reduction : Deserializer Staggered Output
The receiver staggers output switching to provide a random distribution of transitions within a defined window.
Output transitions are distributed randomly. This minimizes the number of outputs switching simultaneously and
helps to reduce supply noise. In addition it spreads the noise spectrum out reducing overall EMI.
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