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| DS90UA102-Q1 Datasheet, PDF (3/46 Pages) Texas Instruments – DS90UA102-Q1 Multi-Channel Digital Audio Link | |||
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Block Diagram
DS90UA102-Q1
SNLS442A â JULY 2013 â REVISED SEPTEMBER 2013
RIN+
RIN-
RT RT
PDB
BISTEN
OEN
CDR
Clock
Gen
Timing and
Control
DOUT[7:0]
GPO[3:0]
GPIO[3:0]
SCK
LOCK
PASS
SDA
SCL
IDx
Figure 2. Block Diagram
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: DS90UA102-Q1
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