NS16C2552_17 Datasheet, PDF (35/53 Pages) Texas Instruments – Dual Independent UART

NS16C2552, NS16C2752
www.ti.com
Set Xon and Xoff flow control
Set Xon1, Xoff1 to VAL1 and VAL2.
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0xBF
• Xon1 0x04.7:0 = VAL1
• Xoff1 0x06.7:0 = VAL2
• LCR 0x03.7:0 = temp
Set Xon2, Xoff2 to VAL1 and VAL2.
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0xBF
• Xon2 0x05.7:0 = VAL1
• Xoff2 0x07.7:0 = VAL2
• LCR 0x03.7:0 = temp
SNLS238D – AUGUST 2006 – REVISED APRIL 2013
Set Software Flow Control
Set software flow control mode to VAL.
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0xBF
• EFR 0x02.3:0 = VAL
• LCR 0x03.7:0 = temp
Configure Tx/Rx FIFO Threshold
Set Tx (2752) and Rx FIFO thresholds to VAL.
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0xBF
• EFR 0x02.4 = 1
• LCR 0x03.7:0 = 0
• FCR 0x02.7:0 = VAL
• LCR 0x03.7:0 = 0xBF
• EFR 0x02.4 = 0 (optional)
• LCR 0x03.7:0 = temp
Tx and Rx Hardware Flow Control
Configure auto RTS and CTS flow controls, enable RTS and CTS interrupts, and assert RTS.
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0xBF
• EFR 0x02.7:6 = 2b’11
• EFR 0x02.4 = 1
• LCR 0x03.7:0 = 0
• IER 0x01.7:6 = 2b’11
• MCR 0x04.1 = 1
• LCR 0x03.7:0 = temp
Tx and Rx DMA Control
Configure Tx and Rx in FIFO mode DMA transfers using the threshold in FCR[7:4].
• Save LCR 0x03.7:0 in temp
• LCR 0x03.7:0 = 0
• FCR 0x02.0 = 1
• FCR 0x02.3 = 1
Copyright © 2006–2013, Texas Instruments Incorporated
Submit Documentation Feedback
35
Product Folder Links: NS16C2552 NS16C2752