NS16C2552_17 Datasheet, PDF (27/53 Pages) Texas Instruments – Dual Independent UART

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NS16C2552, NS16C2752
SNLS238D – AUGUST 2006 – REVISED APRIL 2013
Figure 11. TXRDY in DMA Mode 1
Transmit in non-FIFO Mode
Interrupt Mode
The THR empty flag LSR[5] is set when a data word is transferred to the TSR. THR flag can generate a transmit
empty interrupt IIR[1] enabled by IER[1]. The TSR flag LSR[6] is set when TSR becomes empty. The host CPU
may write one character into the THR and wait for the next IIR[1] interrupt. (Figure 12.)
Figure 12. Tx Non-FIFO Mode
DMA mode
In the DMA single transfer (mode 0), TXRDY asserts when FIFO is empty initiating one DMA transfer and
deasserts when a character is written into the FIFO. (Figure 13.)
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