OMAPL137-HT Datasheet, PDF (327/444 Pages) Texas Instruments – Multimedia Device

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OMAP4460
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SWPS046A – JANUARY 2012
Table 5-131. Low- / Full-Speed USBC1 Timing Requirements—Bidirectional 2-pin Mode—1.8 V, 3.3 V⁽¹⁾⁽²⁾
NO.
PARAMETER
OPP100, OPP119
OPP50
MIN
MAX
MIN
MAX
FSU1
t_d(DAT,SE0)
Time duration, usbc1_icusb_dp (TXDAT, ball
H2) and usbc1_icusb_dm (TSE0, ball H3) low
14.0
14.0
together during transition
FSU2
t_d(DAT,SE0)
Time duration, usbc1_icusb_dp (TXDAT, ball
8.0
8.0
H2) and usbc1_icusb_dm (TSE0, ball H3) high
together during transition
(1) See DM Operating Condition Addendum for CORE OPP voltages.
(2) Low-Speed mode is a subset of the Full-Speed mode and it is expected to work at low bandwidth (1.5Mb/s).
UNIT
ns
ns
usbc1_icusb_dp (Ball H2)
FSU1
FSU2
usbc1_icusb_dm (Ball H3)
FSU1
FSU2
SWPS040-131
Figure 5-85. Low- / Full-Speed USBC1—Bidirectional 2-pin Mode—1.8 V, 3.3 V⁽¹⁾
(1) To use usbc1_icusb_dm as TXDAT signal, use ball H3.
To use usbc1_icusb_dp as TXSE0 signal, use ball H2.
5.6.8.3 Universal Serial Bus (USB)—USBB1
NOTE
For more information, see the Serial Communication Interface / High-Speed Multiport USB
Host Subsystem section of the OMAP4460 TRM.
5.6.8.3.1 Low- / Full-Speed USBB1 (FSUSB)—Bidirectional Standard 4-pin Mode
Table 5-133 and Table 5-134 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 5-86).
Table 5-132. Low- / Full-Speed USBB1 Timing Conditions—Bidirectional Standard 4-pin Mode—1.8 V^(1)(2)(3)
TIMING CONDITION PARAMETER
VALUE
UNIT
MIN
MAX
Input Conditions
t_R
Input signal rise time
t_F
Input signal fall time
PCB Conditions
2
ns
2
ns
Number of external peripherals
1
Far end load
10
pF
Trace length
10
cm
Characteristics impedance
30
60
Ω
(1) IO settings:
– usbb1_mm_txen (ball AF18): MB[1:0] = 10, LB0 = 1
– usbb1_mm_txdat (ball AG18): MB[1:0] = 10, LB0 = 1
– usbb1_mm_txse0 (ball AE17): MB[1:0] = 10, LB0 = 1
– usbb1_mm_rxrcv (ball AF17): MB[1:0] = 10, LB0 = 1
For more information, see Control Module / Control Module Functional Description/ Functional Register Description / Signal Integrity
Parameter Control Registers with Pad Group Assignment / Low Speed I/Os Combined Slew Rate vs TL Length and Load Settings
section of the OMAP4460 TRM.
– Corresponding voltage: 1.8 V
(2) In this table the rise and fall times are calculated for 10% to 90% of VDDS. For more information on the corresponding OMAP4 VDDS
power supply name, see Table 2-1, POWER [9] column with the ball name.
Copyright © 2012, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 327
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