OMAPL137-HT Datasheet, PDF (235/444 Pages) Texas Instruments – Multimedia Device

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lpddr2_ck
lpddr2_nck
lpddr2_cke
lpddr2_ncs
Public Version
DD501
OMAP4460
SWPS046A – JANUARY 2012
DD502
[Cmd]
Valid
Enter SR Nop
Exit SR
Nop
Nop
Valid
SWPS040-027
Figure 5-28. EMIF—DDR Mode—SDRAM Core Parameters—Self-Refresh Command^(1)(2)(3)
(1) X = [3:0]
(2) Y = [31:0]
(3) Z = [9:0]
lpddr2_ck
lpddr2_nck
lpddr2_cke
lpddr2_ncs
[Cmd]
Valid
Enter PD Nop
DD200
DD503
DD200
Exit PD
Nop
Valid
Valid
SWPS040-028
Figure 5-29. EMIF—DDR Mode—SDRAM Core Parameters—Power-Down Exit Time Command⁽¹⁾⁽²⁾
(1) X = [3:0]
(2) Y = [31:0]
(3) Z = [9:0]
Enter Deep Power-Down mode
Exit Deep Power-Down mode
lpddr2_ck
lpddr2_nck
lpddr2_cke
DD504
lpddr2_ncs
[Cmd]
Nop
Enter DPD
Nop
Exit PD
Nop
RESET
SWPS040-029
Figure 5-30. EMIF—DDR Mode—SDRAM Core Parameters—Deep Power-Down Command^(1)(2)(3)
(1) X = [3:0]
(2) Y = [31:0]
(3) Z = [9:0]
Copyright © 2012, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 235
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