TMS320DM8148_17 Datasheet, PDF (304/377 Pages) Texas Instruments – DaVinci Video Processors

TMS320DM8148, TMS320DM8147
SPRS647E – MARCH 2011 – REVISED DECEMBER 2013
32-bit DDR3 EMIF
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DDR[x]_ODT[1] NC
DDR[x]_CS[1] NC
DDR[x]_D[31]
8
DDR[x]_D[24]
DDR[x]_DQM[3]
DDR[x]_DQS[3]
DDR[x]_DQS[3]
DDR[x]_D[23]
8
DDR[x]_D[16]
DDR[x]_DQM[2]
DDR[x]_DQS[2]
DDR[x]_DQS[2]
DDR[x]_D[15]
8
DDR[x]_D[8]
DDR[x]_DQM[1]
DDR[x]_DQS[1]
DDR[x]_DQS[1]
DDR[x]_D[7]
8
DDR[x]_D[0]
DDR[x]_DQM[0]
DDR[x]_DQS[0]
DDR[x]_DQS[0]
DDR[x]_CLK
DDR[x]_CLK
DDR[x]_ODT[0]
DDR[x]_CS[0]
DDR[x]_BA[0]
DDR[x]_BA[1]
DDR[x]_BA[2]
DDR[x]_A[0]
15
DDR[x]_A[14]
DDR[x]_CAS
DDR[x]_RAS
DDR[x]_WE
DDR[x]_CKE
DDR[x]_RST
VREFSSTL_DDR[x]
16-Bit DDR3
Devices
DQ15
DQ8
UDM
UDQS
UDQS
DQ7
DQ15
D08
LDM
LDQS
LDQS
DQ8
UDM
UDQS
UDQS
DQ7
DQ0
LDM
LDQS
LDQS
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A14
CAS
RAS
WE
CKE
RST
ZQ
ZQ
VREFDQ
VREFCA
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A14
CAS
RAS
WE
CKE
RST
ZQ
VREFDQ
VREFCA
Zo ^{0.1 µF}
DDR_1V5
Zo
DDR_VTT
Zo
Zo
DDR_VREF
ZQ
0.1 µF
0.1 µF
0.1 µF
DDR[x]_VTP
50 Ω (±2%)
Zo
Termination is required. See terminator comments.
ZQ
Value determined according to the DDR memory device data sheet.
Figure 8-54. 32-Bit, One-Bank DDR3 Interface Schematic Using Two 16-Bit DDR3 Devices
304 Peripheral Information and Timings
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