TMS320DM8148_17 Datasheet, PDF (228/377 Pages) Texas Instruments – DaVinci Video Processors

TMS320DM8148, TMS320DM8147
SPRS647E – MARCH 2011 – REVISED DECEMBER 2013
www.ti.com
Table 8-5. EDMA Channel Controller (EDMA TPCC) Control Registers (continued)
HEX ADDRESS
0x4900 031C
0x4900 0320
0x4900 0340
0x4900 0344
0x4900 0348
0x4900 034C
0x4900 0350
0x4900 0354
0x4900 0358
0x4900 035C
0x4900 0360
0x4900 0364
0x4900 0368
0x4900 036C
0x4900 0370
0x4900 0374
0x4900 0378
0x4900 037C
0x4900 0380 - 0x4900 039C
0x4900 0400 - 0x4900 04FC
0x4900 0600 - 0x4900 060C
0x4900 0620
0x4900 0640
0x4900 0800
0x4900 0804
0x4900 0808
0x4900 080C
0x4900 0810 - 0x4900 082C
0x4900 1000
0x4900 1004
0x4900 1008
0x4900 100C
0x4900 1010
0x4900 1014
0x4900 1018
0x4900 101C
0x4900 1020
0x4900 1024
0x4900 1028
0x4900 102C
0x4900 1030
0x4900 1034
0x4900 1038
0x4900 103C
0x4900 1040
0x4900 1044
0x4900 1050
ACRONYM
CCERRCLR
EEVAL
DRAE0
DRAEH0
DRAE1
DRAEH1
DRAE2
DRAEH2
DRAE3
DRAEH3
DRAE4
DRAEH4
DRAE5
DRAEH5
DRAE6
DRAEH6
DRAE7
DRAEH7
QRAE0-7
Q0E0-Q3E15
QSTAT0-3
QWMTHRA
CCSTAT
MPFAR
MPFSR
MPFCR
MPPAG
MPPA0-7
ER
ERH
ECR
ECRH
ESR
ESRH
CER
CERH
EER
EERH
EECR
EECRH
EESR
EESRH
SER
SERH
SECR
SECRH
IER
REGISTER NAME
EDMA3CC Error Clear
Error Evaluate
DMA Region Access Enable for Region 0
DMA Region Access Enable High for Region 0
DMA Region Access Enable for Region 1
DMA Region Access Enable High for Region 1
DMA Region Access Enable for Region 2
DMA Region Access Enable High for Region 2
DMA Region Access Enable for Region 3
DMA Region Access Enable High for Region 3
DMA Region Access Enable for Region 4
DMA Region Access Enable High for Region 4
DMA Region Access Enable for Region 5
DMA Region Access Enable High for Region 5
DMA Region Access Enable for Region 6
DMA Region Access Enable High for Region 6
DMA Region Access Enable for Region 7
DMA Region Access Enable High for Region 7
QDMA Region Access Enable for Region 0-7
Event Queue Entry Q0E0-Q3E15
Queue Status 0-3
Queue Watermark Threshold A
EDMA3CC Status
Memory Protection Fault Address
Memory Protection Fault Status
Memory Protection Fault Command
Memory Protection Page Attribute Global
Memory Protection Page Attribute 0-7
Event
Event High
Event Clear
Event Clear High
Event Set
Event Set High
Chained Event
Chained Event High
Event Enable
Event Enable High
Event Enable Clear
Event Enable Clear High
Event Enable Set
Event Enable Set High
Secondary Event
Secondary Event High
Secondary Event Clear
Secondary Event Clear High
Interrupt Enable
228 Peripheral Information and Timings
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