DS64BR401_13 Datasheet, PDF (3/36 Pages) Texas Instruments – Quad Bi-Directional Transceiver with Equalization and De-Emphasis

DS64BR401
www.ti.com
SNLS304G – JUNE 2009 – REVISED APRIL 2013
BLOCK DIAGRAM - DETAIL VIEW OF THE EACH CHANNEL (1 OF 8)
PIN DIAGRAM
VDD
Ix_n+
EQ
Ix_n-
EQA/B
RATE
DET
VOD/DE-EMPHASIS CONTROL
DEMA/B
SMBus
LIMITER
OUTBUF
IDLE
DET
TX Idle Enable
Ox_n+
Ox_n-
SMBus
TXIDLEx
SMBus
OB_0+ 1
OB_0- 2
OB_1+ 3
OB_1- 4
OB_2+ 5
OB_2- 6
OB_3+ 7
OB_3- 8
VDD 9
IA_0+ ¹⁰
IA_0- ¹¹
IA_1+ 12
IA_1- 13
VDD 14
IA_2+ 15
IA_2- 16
IA_3+ ¹⁷
IA_3- 18
SMBUS AND CONTROL
TOP VIEW
DAP = GND
45 IB_0+
44 IB_0-
43 IB_1+
42 IB_1-
41 VDD
40 IB_2+
39 IB_2-
38 IB_3+
37 IB_3-
36 VDD
35 OA_0+
34 OA_0-
33 OA_1+
32 OA_1-
31 OA_2+
30 OA_2-
29 OA_3+
28 OA_3-
Figure 1. DS64BR401 Pin Diagram 54L WQFN
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Product Folder Links: DS64BR401
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