DS90UR910-Q1 Datasheet, PDF (29/34 Pages) Texas Instruments – 10 - 75 MHz 24-bit Color FPD-Link II to CSI-2 Converter

www.ti.com
DS90UR910-Q1
SNLS414D – JUNE 2012 – REVISED JULY 2015
Design Requirements (continued)
Table 8. Design Parameters
Design Parameter
VDDIO
VDDL, VDDA, VDDP, VDDCSI
AC Coupling Capacitor for RIN0± and RIN1±
Example Value
1.8V or 3.3V
1.8V
100nF
The SER/DES supports only AC-coupled interconnects through an integrated DC-balanced decoding scheme.
External AC coupling capacitors must be placed in series in the FPD-Link II signal path as illustrated in
Figure 17.
SER
D_OUT+
D_OUT-
R_IN+
R_IN-
DES
Figure 17. AC-Coupled Connection
For high-speed FPD–Link II transmissions, the smallest available package should be used for the AC coupling
capacitor. This will help minimize degradation of signal quality due to package parasitics. The I/O’s require 100nF
AC coupling capacitors to the line.
7.3 Application Performance Plots
The plot below corresponds to 49MHz PCLK UNH pattern.
Time (250 ps/DIV)
Figure 18. Loop-through CML Output at 1.372 Gbps Serial Line Rate
Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: DS90UR910-Q1
Submit Documentation Feedback
29