DS90UR910-Q1 Datasheet, PDF (13/34 Pages) Texas Instruments – 10 - 75 MHz 24-bit Color FPD-Link II to CSI-2 Converter

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DS90UR910-Q1
SNLS414D – JUNE 2012 – REVISED JULY 2015
Clock Lane
Dp/Dn
T_CLK-POST
VIH(min)
VIL(max)
T_EOT
T_CLK-MISS
Disconnect
Terminator
T_CLK-SETTLE
TCLK-TERM-EN
T_CLK-TRAIL
Data Lane
Dp/Dn
Disconnect
Terminator
T_HS-EXIT
T_LPX
T_CLK-ZERO
T_CLK-PREPARE
T_CLK-PRE
T_LPX
T_HS-PREPARE
VIH(min)
VIL(max)
T_HS-SKIP
T_D-TERM-EN
T_HS-SETTLE
Figure 5. Switching the Clock Lane between Clock Transmission and Low-Power Mode
VS
(internal Node)
DE
(internal Node)
1^st
Line
2^nd
Line
Vertical Blanking
Last
Line
DATA1±
or
DATA0±
FS
Line
Packet
Line
Packet
Line
Packet
Line
Packet
1 to 2¹⁶ tLPX
FE
FS
LPS
LPS
LPS
LPS
LPS
LPS LPS
LPS
Line
Packet
Frame
Sync
Packet
Figure 6. Long Line Packets and Short Frame Sync Packets
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