TMS320DM8127_14 Datasheet, PDF (279/365 Pages) Texas Instruments – DaVinci Video Processors

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TMS320DM8127
SPRS712C – JUNE 2012 – REVISED MARCH 2014
Table 9-49. Switching Characteristics Over Recommended Operating Conditions for ISSCAM (see
Figure 9-45)
NO.
15 t_d(PCLK-FLD)
16 t_d(PCLK-VS)
17 t_d(PCLK-HS)
18 t_{d(PCLK-STROBE)}
19 t_{d(PCLK-SHUTTER)}
PARAMETER
Delay time, PCLK rising/falling clock edge to Control valid
Delay time, PCLK rising/falling clock edge to Control valid
Delay time, PCLK rising/falling clock edge to Control valid
Delay time, PCLK rising/falling clock edge to Control valid
Delay time, PCLK rising/falling clock edge to Control valid
OPP100/120/166
MIN
MAX
3
11.5
3
11.5
3
11.5
3
11.5
3
11.5
UNIT
ns
ns
ns
ns
ns
PCLK
(negative edge clocking)
1
4
3
PCLK
(positive edge clocking)
2
4
Data/Control input
Data/Control output
5
6
7
Figure 9-45. ISSCAM Timings
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Peripheral Information and Timings 279