TL16C752D-Q1 Datasheet, PDF (27/53 Pages) Texas Instruments – Dual UART With 64-Byte FIFO

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TL16C752D-Q1
SLLSET4 – FEBRUARY 2016
Device Functional Modes (continued)
8.4.1.2 Block DMA Transfers (DMA Mode 1)
Transmitter: TXRDY is active when a trigger level number of spaces are available. It becomes inactive when the
FIFO is full.
Receiver: RXRDY becomes active when the trigger level has been reached or when a timeout interrupt occurs. It
goes inactive when the FIFO is empty or an error in the RX FIFO is flagged by LSR(7).
Figure 25 shows TXRDY and RXRDY in DMA mode 1.
wrptr
TX
TXRDY
Trigger
Level
wrptr
TXRDY
RX
Trigger
Level
rdptr
RXRDY
At Least One
Location Filled
rdptr
FIFO Empty
RXRDY
Figure 25. TXRDY and RXRDY in DMA Mode 1
8.4.2 Sleep Mode
Sleep mode is an enhanced feature of the TL16C752D-Q1 UART. It is enabled when EFR[4], the enhanced
functions bit, is set and when IER[4] is set. Sleep mode is entered when:
• The serial data input line, RX, is idle (see Break and Timeout Conditions).
• The TX FIFO and TX shift register are empty.
• There are no interrupts pending except THR and timeout interrupts.
Sleep mode is not entered if there is data in the RX FIFO.
In sleep mode, the UART clock and baud rate clock are stopped. Because most registers are clocked using
these clocks, the power consumption is greatly reduced. The UART wakes up when any change is detected on
the RX line, when there is any change in the state of the modem input pins, or if data is written to the TX FIFO.
NOTE
Writing to the divisor latches, DLL and DLH, to set the baud clock, must not be done
during sleep mode. Therefore, TI recommends to disable sleep mode using IER[4] before
writing to DLL or DLH.
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