TL16C752D-Q1 Datasheet, PDF (1/53 Pages) Texas Instruments – Dual UART With 64-Byte FIFO

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TL16C752D-Q1 Dual UART With 64-Byte FIFO
TL16C752D-Q1
SLLSET4 – FEBRUARY 2016
1 Features
•1 Q100 Automotive Qualified
• Pin Compatible With TL16C2550 With Enhanced
Features Provided Through an Improved FIFO
Register
• Supports Wide Supply Voltage Range of 1.62 V to
5.5 V
– 3 Mbps (48-MHz Oscillator Input Clock)
at 5 V
– 2 Mbps (32-MHz Oscillator Input Clock)
at 3.3 V
– 1.5 Mbps (24-MHz Oscillator Input Clock)
at 2.5 V
– 1 Mbps (16-MHz Oscillator Input Clock)
at 1.8 V
• Characterized for Operation from –40°C to 105°C
• 64-Byte Transmit/Receive FIFO
• Software-Selectable Baud-Rate Generator
• Programmable and Selectable Transmit and
Receive FIFO Trigger Levels for DMA, Interrupt
Generation, and Software or Hardware Flow
Control
• Software/Hardware Flow Control
– Programmable Xon and Xoff Characters With
Optional Xon Any Character
– Programmable Auto-RTS and Auto-CTS-
Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and CD)
• DMA Signaling Capability for Both Received and
Transmitted Data on PN Package
• RS-485 Mode Support
• Infrared Data Association (IrDA) Capability
• Programmable Sleep Mode
• Programmable Serial Interface Characteristics
– 5, 6, 7, or 8-Bit Characters With 1, 1.5, or 2
Stop Bit Generation
– Even, Odd, or No Parity Bit Generation and
Detection
• False Start Bit and Line Break Detection
• Internal Test and Loopback Capabilities
• SC16C752B and XR16M752 Pin Compatible With
Additional Enhancements
2 Applications
• Automotive Infotainment
• Mobile Devices
• Communications Equipment
• White Goods
• Industrial Computing
3 Description
The TL16C752D-Q1 is a dual universal asynchronous
receiver transmitter (UART) with 64-byte FIFOs,
automatic hardware and software flow control, and
data rates up to 3 Mbps. The device offers enhanced
features. It has a transmission character control
register (TCR) that stores received FIFO threshold
level to start or stop transmission during hardware
and software flow control.
With the FIFO RDY register, the software gets the
status of TXRDY or RXRDY for all two ports in one
access. On-chip status registers provide the user with
error indications, operational status, and modem
interface control. System interrupts may be tailored to
meet user requirements. An internal loop-back
capability allows onboard diagnostics. The
TL16C752D-Q1 incorporates the functionality of two
UARTs, each UART having its own register set and
FIFOs.
Device Information⁽¹⁾
PART NUMBER PACKAGE
BODY SIZE (NOM)
TL16C752D-Q1 TQFP (48)
3.67 mm × 3.67 mm ×
0.38 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Block Diagram
A2 to A0
D7 to D0
CSA
CSB
IOR
IOW
INTA
INTB
TXRDYA
TXRDYB
RXRDYA
RXRDYB
RESET
XTAL1
XTAL2
Data Bus
Interface
Crystal
Oscillator
Buffer
UART Channel A
64-Byte TX FIFO TX
UART Regs
Baud
Rate
Generator
64-Byte RX FIFO
RX
UART Channel B
64-Byte TX FIFO TX
UART Regs
Baud
Rate
Generator
64-Byte RX FIFO
RX
TXA
CTSA
OPA, DTRA
DSRA, RIA, CDA
RTSA
RXA
TXB
CTSB
OPB, DTRB
DSRB, RIB, CDB
RTSB
RXB
V_CC
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.