TL16C752D-Q1 Datasheet, PDF (13/53 Pages) Texas Instruments – Dual UART With 64-Byte FIFO

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TX (A–B)
IOW
D0–D7
TXRDY (A–B)
TXRDY
TL16C752D-Q1
SLLSET4 – FEBRUARY 2016
Active
Start
Bit
Data Bits (5–8)
Stop
Bit
D0
D1 D2 D3 D4 D5 D6 D7
5 Data Bits
6 Data Bits
7 Data Bits
Parity
Bit
Trigger
Level
t_28d
t_27d
Trigger
Level
Figure 9. Transmit Timing in FIFO Mode
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