LP2975 Datasheet, PDF (26/37 Pages) National Semiconductor (TI) – MOSFET LDO Driver/Controller

LP2975
SNVS006F – SEPTEMBER 1997 – REVISED APRIL 2013
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As shown, moving the location of f_z lower in frequency extends the bandwidth, pushing the crossover frequency
f_c out to about 200 kHz. In viewing the plot, it can be seen that f_p and f_z essentially cancel out, leaving only the
controller pole and f_pg. However, since f_pg now occurs well before f_c, it will cause enough phase shift to leave
very little phase margin. This application would either oscillate continuously or be marginally stable (meaning it
would exhibit severe ringing on transient steps).
This can be improved by adding a feed-forward capacitor C_F, which adds a zero (f_zf) and a pole (f_pf) to the gain
plot (see Figure 30).
In this case, C_F is selected to place f_zf at about the same frequency as f_pg (essentially cancelling out the phase
shift due to f_pg). Assuming the added pole f_pf is near or beyond the f_c frequency, it will add < 45° of phase lag,
leaving a phase margin of > 45° (adequate for good stability).
Figure 30. High ESR Corrected with Feed-Forward
LOW ESR: To illustrate how an output capacitor with low ESR can cause an LDO regulator to oscillate, the same
example will be shown except that the ESR will be reduced sufficiently to increase the original f_z from 5 kHz to 50
kHz.
The plot now shows (see Figure 31) that the crossover frequency f_c has moved down to about 8 kHz. Since f_z is
6X f_c, it means that the zero f_z can only provide about 9° of phase lead at f_c, which is not sufficient for stability.
Figure 31. Low ESR Unstable without Feed-Forward
This application can also be improved by adding a feed-forward capacitor. C_F will add both a zero f_zf and pole f_pf
to the gain plot (see Figure 32).
The crossover frequency f_c is now about 10 kHz. If C_F is selected so that f_zf is about 5 kHz, and f_pf is about 20
kHz (which means V_OUT = 5V), the phase margin will be considerably improved. Calculating out all the poles and
zeroes, the phase margin is increased from 9° to 43° (adequate for good stability).
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