LP2975 Datasheet, PDF (25/37 Pages) National Semiconductor (TI) – MOSFET LDO Driver/Controller

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LP2975
SNVS006F – SEPTEMBER 1997 – REVISED APRIL 2013
Figure 28. Improved Phase Margin with Feed-Forward
To estimate the total phase margin, the individual phase shift contributions of each pole and zero will be
calculated assuming f_p = 200 Hz, f_z = 5 kHz, f_zf = 10 kHz, f_pf = 40 kHz, f_c = 50 kHz, and f_pg= 100 kHz:
Controller pole shift = −90°
f_p shift = −arctan (50k/200) = −90°
f_z shift = arctan (50k/5k) = +84°
f_zf shift = arctan (50k/100k) = +79°
f_pf shift = −arctan (50k/40k) = −51°
f_pg shift = −arctan (50k/100k) = −27°
Summing the six numbers, the estimate for the total phase shift is −95°, which corresponds to a phase margin
of 85° (a 27° improvement over the same application without the feed-forward capacitor).
For this reason, a feed-forward capacitor is recommended in all applications. Although not always required, the
added phase margin typically gives faster settling times and provides some design guard band against C_OUT and
ESR variations with temperature.
Causes and Cures of Oscillations
The most common cause of oscillations in an LDO application is the output capacitor ESR. If the ESR is too high
or too low, the zero (f_z) does not provide enough phase lead.
HIGH ESR: To illustrate the effect of an output capacitor with high ESR, the previous example will be repeated
except that the ESR will be increased by a factor of 20X. This will cause the frequency of the zero f_z to
decrease by 20X, which moves it from 5 kHz down to 250 Hz (see Figure 29).
Figure 29. High ESR Unstable without Feed-Forward
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