DRV8704 Datasheet, PDF (24/38 Pages) Texas Instruments – Dual H-Bridge PWM Gate Driver

DRV8704
SLVSD29 – OCTOBER 2015
www.ti.com
Typical Application (continued)
8.2.1 Design Requirements
Table 12 shows design input parameters for system design.
Table 12. Design Parameters
DESIGN PARAMETER
Supply voltage
FET total gate charge ⁽¹⁾
FET gate-to-drain charge ⁽¹⁾
Target FET gate rise time
Motor winding resistance
Motor winding inductance
Target chopping current
REFERENCE
VM
Q_g
Q_gd
RT
R_L
L_L
I_CHOP
(1) FET part number is CSD18540Q5B
8.2.2 Detailed Design Procedure
EXAMPLE VALUE
24 V
41 nC (typically)
6.7 nC (typically)
20 to 100 ns
400 mΩ
258 μH
5.5 A
8.2.2.1 External FET Selection
The DRV8704 FET support is based on the charge pump capacity and output PWM frequency. For a quick
calculation of FET driving capacity, use the following equations when drive and brake (slow decay) are the
primary modes of operation:
Q_g
I_VCP
u ¦_PWM
where
• ƒ_PWM is the maximum desired PWM frequency to be applied to the DRV8704 inputs or the current chopping
frequency, whichever is larger.
• I_VCP is the charge pump capacity, which is 20 mA.
(5)
The factor of two arises because there are two H-bridges present.
The current chopping frequency is at most:
¦_PWM
1
t_OFF t_BLANK
(6)
Example:
If a system uses a maximum PWM frequency of 40 kHz, then the DRV8704 will support Q_g < 250 nC FETs.
If the application will require a forced fast decay (or alternating between drive and reverse drive), the maximum
FET driving capacity is given by:
Q_g
I_VCP
u ¦_PWM
(7)
8.2.2.2 IDRIVE Configuration
IDRIVE is selected based on the gate charge of the FETs. The IDRIVEx and TDRIVEx registers need to be
configured so that the FET gates are charged completely during TDRIVE. If IDRIVE is chosen to be too low for a
given FET, or if TDRIVE is less than the intended rise time, then the FET may not turn on completely. TI
suggests to adjust these values in-system with the required external FETs and motor to determine the best
possible setting for any application.
For FETs with a known gate-to-drain charge Q_gd and desired rise time RT, IDRIVE and TDRIVE can be selected
based on:
IDRIVE ! ^Qgd
RT
(8)
TDRIVE > 2 × RT
(9)
24
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