DRV8704 Datasheet, PDF (19/38 Pages) Texas Instruments – Dual H-Bridge PWM Gate Driver

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DRV8704
SLVSD29 – OCTOBER 2015
7.3.9.4 Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all FETs in the H-
bridge will be disabled, the UVLO bit in the STATUS register will be set, and the FAULTn pin will be driven low.
Operation will resume and the UVLO bit will reset when VM rises above the UVLO threshold. The FAULTn pin
will be released after operation has resumed.
7.3.10 Serial Data Format
The serial data consists of a 16-bit serial write, with a read/write bit, 3 address bits and 12 data bits. The three
address bits identify one of the registers defined in the register section above. To complete the read or write
transaction, SCS must be set to a logic 0.
To write to a register, data is shifted in after the address as shown in the timing diagram below. The first bit at
the beginning of the access must be logic low for a write operation.
Figure 16. Serial Write Operation
Data may be read from the registers through the SDATO pin. During a read operation, only the address is used
form the SDATI pin; the data bits following are ignored. The first bit at the beginning of the access must be logic
high for a read operation.
(1) Any amount of time may pass between bits, as long as SCS stays active high. This allows two 8-bit writes to be used
Figure 17. Serial Read Operation
7.4 Device Functional Modes
The DRV8704 is active unless the nSLEEP pin is brought logic low. In sleep mode the charge pump is disabled,
the H-bridge FETs are disabled Hi-Z, and the V5 regulator is disabled. The DRV8704 is brought out of sleep
mode automatically if nSLEEP is brought logic high.
If a ‘0’ is written to the ENBL bit, the H-bridge outputs are disabled, but the internal logic will still be active.
Operating
Disabled
Sleep mode
Fault
encountered
CONDITION
8 V < VM < 52 V
nSLEEP pin = 1
ENBL bit = 1
8 V < VM < 52 V
nSLEEP pin = 1
ENBL bit = 0
8 V < VM < 52 V
nSLEEP pin = 0
Any fault condition met
Table 2. Functional Modes
H-BRIDGE
CHARGE PUMP
Operating
Operating
SPI
Operating
V5
Operating
Disabled
Disabled
Disabled
Operating
Disabled
Depends on fault
Operating
Disabled
Depends on fault
Operating
Disabled
Depends on fault
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