BQ25600 Datasheet, PDF (19/66 Pages) Texas Instruments – I2C Controlled 3.0-A, Single Cell Battery Charger With up-to 40-V Overvoltage Protection Controller for High-Input Voltage and Narrow Voltage DC (NVDC) Power Path Management

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Feature Description (continued)
bq25600, bq25600D
SLUSCJ4 – JUNE 2017
VAC
t_DEB
ACDRV
V_{VAC_OV (rising)}
V_{VAC_PRESENT (rising)}
t_{ON_VBUS}
90%
10%
VBUS
90%
10%
Time
Figure 10. OVPFET Startup Control
7.3.3.2 Power Up REGN Regulation
The REGN LDO supplies internal bias circuits as well as the HSFET and LSFET gate drive. The REGN also
provides bias rail to TS external resistors. The pull-up rail of STAT can be connected to REGN as well. The
REGN is enabled when all the below conditions are valid:
• V_VAC above V_{VAC_PRESENT}
• V_VAC above V_BAT + V_SLEEPZ in buck mode or VBUS below V_BAT + V_SLEEP in boost mode
• After 220-ms delay is completed
If any one of the above conditions is not valid, the device is in high impedance mode (HIZ) with REGN LDO off.
The device draws less than IVBUS_HIZ from VBUS during HIZ state. The battery powers up the system when
the device is in HIZ.
7.3.3.3 Poor Source Qualification
After REGN LDO powers up, the device confirms the current capability of the input source. The input source
must meet both of the following requirements in order to start the buck converter.
• VAC voltage below V_{VAC_OV}
• VBUS voltage above V_VBUSMIN when pulling I_BADSRC (typical 30 mA)
Once the input source passes all the conditions above, the status register bit VBUS_GD is set high and the INT
pin is pulsed to signal to the host. If the device fails the poor source detection, it repeats poor source qualification
every 2 seconds.
7.3.3.4 Input Source Type Detection
After the VBUS_GD bit is set and REGN LDO is powered, the device runs input source detection through D+/D–
lines or the PSEL pin. The bq25600D follows the USB Battery Charging Specification 1.2 (BC1.2) to detect input
source (SDP/ DCP) and non-standard adapter through USB D+/D– lines. The bq25600 sets input current limit
through PSEL pins.
After input source type detection is completed, an INT pulse is asserted to the host. in addition, the following
registers and pin are changed:
1. Input Current Limit (IINDPM) register is changed to set current limit
2. PG_STAT bit is set
3. VBUS_STAT bit is updated to indicate USB or other input source
Copyright © 2017, Texas Instruments Incorporated
Product Folder Links: bq25600 bq25600D
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