DS90UR907Q-Q1 Datasheet, PDF (18/35 Pages) Texas Instruments – 24-Bit Color FPD-Link to FPD-Link II Converter

DS90UR907Q-Q1
SNLS316G – SEPTEMBER 2009 – REVISED DECEMBER 2015
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7.4 Device Functional Modes
7.4.1 Operating Modes and Backward Compatibility (Config[1:0])
The DS90UR907Q is backward compatible with previous generations of FPD-Link II deserializers. Configuration
modes are provided for backwards compatibility with the DS90C124 FPD-LinkII Generation 1, and also the
DS90UR124 FPD-Link II Generation 2 deserializers by setting the respective mode with the CONFIG[1:0] pins as
shown in Table 4. The selection also determines whether the Video Control Signal filter feature is enabled or
disabled in Normal mode.
CONFIG 1
L
L
H
H
Table 4. DS90UR907Q
CONFIG 0
L
H
L
H
MODE
Normal Mode, Control Signal
Filter disabled
Normal Mode, Control Signal
Filter enabled
Backwards compatible GEN2
Backwards compatible GEN1
DES DEVICE
DS90UR908Q, DS90UR906Q
DS90UR908Q, DS90UR906Q
DS90UR124, DS99R124
DS90C124
7.5 Programming
7.5.1 Optional Serial Bus Control
See the following section on the Optional Serial Bus Control Interface.
7.5.2 Built In Self Test (BIST)
An optional At-Speed Built In Self Test (BIST) feature supports the testing of the high-speed serial link. This is
useful in the prototype stage, equipment production, in-system test and also for system diagnostics. In the BIST
mode only a input clock is required along with control to the DS90UR907Q and deserializer BISTEN input pins.
The DS90UR907Q outputs a test pattern (PRBS7) and drives the link at speed. The deserializer detects the
PRBS7 pattern and monitors it for errors. A PASS output pin toggles to flag any payloads that are received with
1 to 24 errors. Upon completion of the test, the result of the test is held on the PASS output until reset (new BIST
test or Power Down). A high on PASS indicates NO ERRORS were detected. A Low on PASS indicates one or
more errors were detected. The duration of the test is controlled by the pulse width applied to the deserializer
BISTEN pin.
Inter-operability is supported between this FPD-Link II device and all FPD-Link II generations (Gen 1/2/3) — see
respective data sheets for details on entering BIST mode and control.
Sample BIST Sequence
See Figure 19 for the BIST mode flow diagram.
Step 1: Place the DS90UR907Q in BIST Mode by setting Ser BISTEN = H. The BIST Mode is enabled through
the BISTEN pin. An RxCLKIN is required for all the Ser options. When the deserializer detects the BIST mode
pattern and command (DCA and DCB code) the RGB and control signal outputs are shut off.
Step 2: Place the pairing deserializer in BIST mode by setting the BISTEN = H. The Des is now in the BIST
mode and checks the incoming serial payloads for errors. If an error in the payload (1 to 24) is detected, the
PASS pin will switch low for one half of the clock period. During the BIST test, the PASS output can be
monitored and counted to determine the payload error rate.
Step 3: To Stop the BIST mode, the deserializer BISTEN pin is set Low. The deserializer stops checking the
data and the final test result is held on the PASS pin. If the test ran error free, the PASS output will be High. If
there was one or more errors detected, the PASS output will be Low. The PASS output state is held until a new
BIST is run, the device is RESET, or Powered Down. The BIST duration is user controlled by the duration of the
BISTEN signal.
Step 4: To return the link to normal operation, the DS90UR907Q BISTEN input is set Low. The Link returns to
normal operation.
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