English
Language : 

BQ24188_15 Datasheet, PDF (9/52 Pages) Texas Instruments – bq24188 2A, 30V, Host-Controlled Single-Input, Single Cell Switchmode Li-Ion Battery Charger with Power Path Management and USB-OTG Support
www.ti.com
bq24188
SLUSC44A – DECEMBER 2014 – REVISED MAY 2015
Electrical Characteristics (continued)
Circuit of Figure 7, VUVLO < VIN < VOVP AND VIN > VBAT+ VSLP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PROTECTION
VUVLO
VUVLO_HYS
VBATUVLO
IC active threshold voltage
IC active hysteresis
Battery Undervoltage Lockout
threshold
VIN rising
VIN falling from above VUVLO
VBAT falling, 100mV Hysteresis
3.2
3.3
3.4
V
300
mV
2.4
2.6
V
VSLP
tDGL(BAT)
Sleep-mode entry threshold,
VIN-VBAT
Deglitch time, BAT above
VBATUVLO before SYS starts to
rise
2.0 V < VBAT < VBATREG, VIN falling
0
40
120
mV
1.2
ms
VSLP_HYS
tDGL(VSLP)
VOVP
Sleep-mode exit hysteresis
Deglitch time for supply rising
above VSLP+VSLP_HYS
Input supply OVP threshold
voltage
VIN rising above VSLP
Rising voltage, 2-mV over drive, tRISE=100ns
N rising, 100mV hysteresis
40
100
190
mV
30
ms
13.6
14
14.4
V
VBATGD
Good Battery Monitor
Threshold
VIN Rising
3.51
3.7
3.89
V
tDGL(BUCK_OVP)
Deglitch time, VIN OVP in
Buck Mode
IN falling below VOVP
30
ms
VBOVP
VBOVP_HYS
tDGL(BOVP)
ICbCLIMIT
TSHTDWN
Battery OVP threshold voltage VBAT threshold over VOREG to turn off charger during charge
VBOVP hysteresis
BOVP Deglitch
Cycle-by-cycle current limit
Thermal trip
Thermal hysteresis
Lower limit for VBAT falling from above VBOVP
Battery entering/exiting BOVP
VSYS shorted
1.03 ×
VBATREG
4.1
1.05 ×
VBATREG
1
8
4.5
150
10
1.07 ×
VBATREG
4.9
V
% of
VBATREG
ms
A
°C
°C
TREG
Thermal regulation threshold Input current begins to cut off
Safety Timer Accuracy
125
°C
–20%
20%
PWM
RDSON_Q1
Internal top MOSFET on-
resistance
YFF Package: Measured from IN to SW
RGE Package: Measured from IN to SW
75
120
mΩ
80
135
mΩ
RDSON_Q2
Internal bottom N-channel
MOSFET on-resistance
YFF Package: Measured from SW to PGND
RGE Package: Measured from SW to PGND
75
115
mΩ
80
135
mΩ
fOSC
Oscillator frequency
DMAX
Maximum duty cycle
DMIN
Minimum duty cycle
BATTERY-PACK NTC MONITOR (1)
1.35
1.5
1.65
MHz
95
%
0
VHOT
VWARM
VCOOL
VCOLD
TSOFF
High temperature threshold
Warm temperature threshold
Cool temperature threshold
Low temperature threshold
TS Disable threshold
tDGL(TS)
Deglitch time on TS change
I2C COMPATIBLE INTERFACE
VTS falling, 2% VDRV Hysteresis
VTS falling, 2% VDRV Hysteresis
VTS rising, 2% VDRV Hysteresis
VTS rising, 2% VDRV Hysteresis
VTS rising, 4% VDRV Hysteresis
Applies to VHOT, VWARM, VCOOL and VCOLD
27.3
36.0
54.7
58.2
80
30
38.3
56.4
60
50
32.6
41.2
58.1
61.8
85
%VDRV
%VDRV
%VDRV
%VDRV
%VDRV
ms
VIH
VIL
VOL
IBIAS
tWATCHDOG
tI2CRESET
Input low threshold level
Input low threshold level
Output low threshold level
High-Level leakage current
VPULL-UP=1.8V, SDA and SCL
VPULL-UP=1.8V, SDA and SCL
IL=5mA, sink current
VPULL-UP=1.8V, SDA and SCL
1.3
V
0.4
V
0.4
V
1
μA
30
50
s
700
ms
Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: bq24188
Submit Documentation Feedback
9