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BQ24188_15 Datasheet, PDF (2/52 Pages) Texas Instruments – bq24188 2A, 30V, Host-Controlled Single-Input, Single Cell Switchmode Li-Ion Battery Charger with Power Path Management and USB-OTG Support
bq24188
SLUSC44A – DECEMBER 2014 – REVISED MAY 2015
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Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Application Schematic .......................................... 1
5 Revision History..................................................... 2
6 Device Comparison Table..................................... 3
7 Pin Configuration and Functions ......................... 3
8 Specifications......................................................... 5
8.1 Absolute Maximum Ratings ..................................... 5
8.2 ESD Ratings ............................................................ 5
8.3 Recommended Operating Conditions....................... 5
8.4 Thermal Information ................................................. 6
8.5 Electrical Characteristics........................................... 6
8.6 Switching Characteristics ........................................ 10
8.7 Typical Characteristics ............................................ 11
9 Detailed Description ............................................ 12
9.1 Overview ................................................................. 12
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 15
9.4 Device Functional Modes........................................ 15
9.5 Programming........................................................... 26
9.6 Register Descriptions .............................................. 29
10 Applications and Implementation...................... 36
10.1 Application Information.......................................... 36
10.2 Typical Applications .............................................. 36
11 Power Supply Recommendations ..................... 41
11.1 Requirements for SYS Output .............................. 41
11.2 Requirements for Charging ................................... 41
12 Layout................................................................... 42
12.1 Layout Guidelines ................................................. 42
12.2 Layout Example .................................................... 42
13 Device and Documentation Support ................. 44
13.1 Documentation Support ....................................... 44
13.2 Trademarks ........................................................... 44
13.3 Electrostatic Discharge Caution ............................ 44
13.4 Glossary ................................................................ 44
14 Mechanical, Packaging, and Orderable
Information ........................................................... 44
5 Revision History
Changes from Original (December 2014) to Revision A
Page
• Changed minimum capacitance for DRV pin from 1 µF to 2.2 µF ........................................................................................ 4
• Changed absolute max voltage for DRV, SYS from 5.0 V to 5.5 V ....................................................................................... 5
• Added specifications to Electrical Characteristics table pertaining to RGE package............................................................. 6
• Added separate lines for IINLIM current for YFF and RGE packages. ..................................................................................... 8
• Changed VDO_DRV spec MAX voltage from "500 mV" to "450 mV" ......................................................................................... 8
• Added footnote to the Electrical Characteristics table for the ILIM(DISCH) specification: "Continuous and periodic pulse
currents from BAT to SYS are limited by output current specifications in the Absolute Max Ratings table" ....................... 10
• Changed the DRV bypass capacitor in the Typical Application circuit diagrams from 1 µF to 2.2 µF ................................ 36
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